MIPS16/opcodes: Keep the LSB of PC-relative offsets in disassembly
authorMaciej W. Rozycki <macro@imgtec.com>
Tue, 2 May 2017 10:53:30 +0000 (11:53 +0100)
committerMaciej W. Rozycki <macro@imgtec.com>
Tue, 2 May 2017 10:58:44 +0000 (11:58 +0100)
Correct the disassembly of the PC-relative immediate argument of the
MIPS16 synthetic LA, LW, DLA and LD instructions and do not mask the
LSB, which in this case is a part of the data address rather than the
ISA bit and has to be fully presented.

opcodes/
* mips-dis.c (print_insn_arg): Only clear the ISA bit for jumps
and branches and not synthetic data instructions.

binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Adjust the
disassembly of PC-relative LA and LW synthetic instructions.

binutils/ChangeLog
binutils/testsuite/binutils-all/mips/mips16-undecoded.d
opcodes/ChangeLog
opcodes/mips-dis.c

index 5fdcd4dd77763a21d65c2febce255eb6570bb1bd..aef436d3020b48d6fddddf2ec539017bbab59160 100644 (file)
@@ -1,3 +1,8 @@
+2017-05-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/binutils-all/mips/mips16-undecoded.d: Adjust the
+       disassembly of PC-relative LA and LW synthetic instructions.
+
 2017-05-02  Nick Clifton  <nickc@redhat.com>
 
        PR 21440
index 42a5cdf9027faac0bb5c545ea17ddbd621b66f07..b455419e557dcf1ce041a74266d2acb6a1172806 100644 (file)
@@ -11,11 +11,11 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f008 0231    addiu   v0,sp,16401
 [0-9a-f]+ <[^>]*> f008 0251    addiu   v0,sp,16401
 [0-9a-f]+ <[^>]*> f008 0291    addiu   v0,sp,16401
-[0-9a-f]+ <[^>]*> f008 0a11    la      v0,00004024 <foo\+0x4024>
-[0-9a-f]+ <[^>]*> f008 0a11    la      v0,00004028 <foo\+0x4028>
-[0-9a-f]+ <[^>]*> f008 0a31    la      v0,0000402c <foo\+0x402c>
-[0-9a-f]+ <[^>]*> f008 0a51    la      v0,00004030 <foo\+0x4030>
-[0-9a-f]+ <[^>]*> f008 0a91    la      v0,00004034 <foo\+0x4034>
+[0-9a-f]+ <[^>]*> f008 0a11    la      v0,00004025 <foo\+0x4025>
+[0-9a-f]+ <[^>]*> f008 0a11    la      v0,00004029 <foo\+0x4029>
+[0-9a-f]+ <[^>]*> f008 0a31    la      v0,0000402d <foo\+0x402d>
+[0-9a-f]+ <[^>]*> f008 0a51    la      v0,00004031 <foo\+0x4031>
+[0-9a-f]+ <[^>]*> f008 0a91    la      v0,00004035 <foo\+0x4035>
 [0-9a-f]+ <[^>]*> f008 1011    b       0000804e <foo\+0x804e>
 [0-9a-f]+ <[^>]*> f008 1011    b       00008052 <foo\+0x8052>
 [0-9a-f]+ <[^>]*> f008 1031    b       00008056 <foo\+0x8056>
@@ -64,11 +64,11 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f008 9231    lw      v0,16401\(sp\)
 [0-9a-f]+ <[^>]*> f008 9251    lw      v0,16401\(sp\)
 [0-9a-f]+ <[^>]*> f008 9291    lw      v0,16401\(sp\)
-[0-9a-f]+ <[^>]*> f008 b211    lw      v0,000040f8 <foo\+0x40f8>
-[0-9a-f]+ <[^>]*> f008 b211    lw      v0,000040fc <foo\+0x40fc>
-[0-9a-f]+ <[^>]*> f008 b231    lw      v0,00004100 <foo\+0x4100>
-[0-9a-f]+ <[^>]*> f008 b251    lw      v0,00004104 <foo\+0x4104>
-[0-9a-f]+ <[^>]*> f008 b291    lw      v0,00004108 <foo\+0x4108>
+[0-9a-f]+ <[^>]*> f008 b211    lw      v0,000040f9 <foo\+0x40f9>
+[0-9a-f]+ <[^>]*> f008 b211    lw      v0,000040fd <foo\+0x40fd>
+[0-9a-f]+ <[^>]*> f008 b231    lw      v0,00004101 <foo\+0x4101>
+[0-9a-f]+ <[^>]*> f008 b251    lw      v0,00004105 <foo\+0x4105>
+[0-9a-f]+ <[^>]*> f008 b291    lw      v0,00004109 <foo\+0x4109>
 [0-9a-f]+ <[^>]*> f008 d211    sw      v0,16401\(sp\)
 [0-9a-f]+ <[^>]*> f008 d211    sw      v0,16401\(sp\)
 [0-9a-f]+ <[^>]*> f008 d231    sw      v0,16401\(sp\)
index ad3a01afe824bd142ba04a7a9761133d4a8ccdef..dcde282527f0bf8931b8d3ee1f8a8899cb0c1b89 100644 (file)
@@ -1,3 +1,8 @@
+2017-05-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * mips-dis.c (print_insn_arg): Only clear the ISA bit for jumps
+       and branches and not synthetic data instructions.
+
 2017-05-02  Bernd Edlinger   <bernd.edlinger@hotmail.de>
 
        * arm-dis.c (print_insn_thumb32): Fix value_in_comment.
index 4a08d8a4a0a157e888b494ea2c0495b43baf13ba..289f50160ae1015fb8e9c7ef915f9e5b5637dade 100644 (file)
@@ -1281,9 +1281,10 @@ print_insn_arg (struct disassemble_info *info,
        pcrel_op = (const struct mips_pcrel_operand *) operand;
        info->target = mips_decode_pcrel_operand (pcrel_op, base_pc, uval);
 
-       /* Preserve the ISA bit for the GDB disassembler,
-          otherwise clear it.  */
-       if (info->flavour != bfd_target_unknown_flavour)
+       /* For jumps and branches clear the ISA bit except for
+          the GDB disassembler.  */
+       if (pcrel_op->include_isa_bit
+           && info->flavour != bfd_target_unknown_flavour)
          info->target &= -2;
 
        (*info->print_address_func) (info->target, info);
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