Merge tag 'v3.18-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git...

Allow parent rate changes for i2s on rk3288
and rockchip as well as s3c24xx restart handlers.

diff --combined arch/arm64/kernel/process.c
index 29d48690f2ac59ef56d5384d1fde5db92f0624e7,398ab05081b437438d41fabf6691aee5c76e1361..e0ef8ba4fdb904433fae578dc8d5782c1ac94cb1
--- 1/arch/arm64/kernel/process.c
--- 2/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@@ -98,7 -98,6 +98,6 @@@ void (*pm_power_off)(void)
  EXPORT_SYMBOL_GPL(pm_power_off);
  
  void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
- EXPORT_SYMBOL_GPL(arm_pm_restart);
  
  /*
   * This is our default idle handler.
@@@ -180,6 -179,8 +179,8 @@@ void machine_restart(char *cmd
        /* Now call the architecture specific reboot code. */
        if (arm_pm_restart)
                arm_pm_restart(reboot_mode, cmd);
+       else
+               do_kernel_restart(cmd);
  
        /*
         * Whoops - the architecture was unable to reboot.
@@@ -230,27 -231,9 +231,27 @@@ void exit_thread(void
  {
  }
  
 +static void tls_thread_flush(void)
 +{
 +      asm ("msr tpidr_el0, xzr");
 +
 +      if (is_compat_task()) {
 +              current->thread.tp_value = 0;
 +
 +              /*
 +               * We need to ensure ordering between the shadow state and the
 +               * hardware state, so that we don't corrupt the hardware state
 +               * with a stale shadow state during context switch.
 +               */
 +              barrier();
 +              asm ("msr tpidrro_el0, xzr");
 +      }
 +}
 +
  void flush_thread(void)
  {
        fpsimd_flush_thread();
 +      tls_thread_flush();
        flush_ptrace_hw_breakpoint(current);
  }