ARM: tegra: remove ifdef in the tegra_resume

The ifdef was originally added with the intent that the runtime SoC
detection code, and code to support SoCs other than Tegra20, was only
included if the kernel supported SoCs other than Tegra20. However,
the condition was somewhat backwards and did not achieve this goal.
Simply remove the ifdef to solve this, rather than creating a much more
complex version.

We also fix a typo that caused a build error due to cpu_to_csr_req being
undefined.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: rewrote commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index d2042ac736ebe57f1d6633037bd42dfeaf86553e..39dc9e7834f38b161d2cc7ac3e53d140c97383d7 100644 (file)
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -54,12 +54,11 @@ ENTRY(tegra_resume)
        bne     cpu_resume                      @ no
 no_cpu0_chk:
 
-#ifndef CONFIG_ARCH_TEGRA_2x_SOC
        /* Are we on Tegra20? */
        cmp     r6, #TEGRA20
        beq     1f                              @ Yes
        /* Clear the flow controller flags for this CPU. */
-       cpu_to_csr_req r1, r0
+       cpu_to_csr_reg r1, r0
        mov32   r2, TEGRA_FLOW_CTRL_BASE
        ldr     r1, [r2, r1]
        /* Clear event & intr flag */
@@ -70,7 +69,6 @@ no_cpu0_chk:
        bic     r1, r1, r0
        str     r1, [r2]
 1:
-#endif
 
        check_cpu_part_num 0xc09, r8, r9
        bne     not_ca9