TULIP: Fix for 64-bit MIPS
authorValerie Henson <val_henson@linux.intel.com>
Mon, 12 Mar 2007 09:31:29 +0000 (02:31 -0700)
committerJeff Garzik <jeff@garzik.org>
Sat, 28 Apr 2007 15:00:58 +0000 (11:00 -0400)
From: Jim Gifford <maillist@jg555.com>, Grant Grundler <grundler@parisc-linux.org>, Peter Horton <pdh@colonel-panic.org>

With Grant's help I was able to get the tulip driver to work with 64 bit
MIPS.

[VAL: I'm happy with the 1.5 ms max delay; it doesn't seem excessive.]

Signed-off-by: Valerie Henson <val_henson@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/net/tulip/media.c
drivers/net/tulip/tulip.h

index 20bd52b869937e5691e3118d210fcd3ae9c1418e..1594160a0f6252bbdc1c3d25c1ea7eddca278912 100644 (file)
@@ -44,8 +44,10 @@ static const unsigned char comet_miireg2offset[32] = {
 
 /* MII transceiver control section.
    Read and write the MII registers using software-generated serial
-   MDIO protocol.  See the MII specifications or DP83840A data sheet
-   for details. */
+   MDIO protocol.
+   See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
+   or DP83840A data sheet for more details.
+   */
 
 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
 {
@@ -272,13 +274,29 @@ void tulip_select_media(struct net_device *dev, int startup)
                                int reset_length = p[2 + init_length];
                                misc_info = (u16*)(reset_sequence + reset_length);
                                if (startup) {
+                                       int timeout = 10;       /* max 1 ms */
                                        iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
                                        for (i = 0; i < reset_length; i++)
                                                iowrite32(reset_sequence[i], ioaddr + CSR12);
+
+                                       /* flush posted writes */
+                                       ioread32(ioaddr + CSR12);
+
+                                       /* Sect 3.10.3 in DP83840A.pdf (p39) */
+                                       udelay(500);
+
+                                       /* Section 4.2 in DP83840A.pdf (p43) */
+                                       /* and IEEE 802.3 "22.2.4.1.1 Reset" */
+                                       while (timeout-- &&
+                                               (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
+                                               udelay(100);
                                }
                                for (i = 0; i < init_length; i++)
                                        iowrite32(init_sequence[i], ioaddr + CSR12);
+
+                               ioread32(ioaddr + CSR12);       /* flush posted writes */
                        }
+
                        tmp_info = get_u16(&misc_info[1]);
                        if (tmp_info)
                                tp->advertising[phy_num] = tmp_info | 1;
index 25f25da7691714f881073404dc71e8500b8fc758..ceac47e775ceff4f4e95f70e9f4de344c700342f 100644 (file)
@@ -482,8 +482,11 @@ static inline void tulip_stop_rxtx(struct tulip_private *tp)
                        udelay(10);
 
                if (!i)
-                       printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed\n",
-                                       pci_name(tp->pdev));
+                       printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed"
+                                       " (CSR5 0x%x CSR6 0x%x)\n",
+                                       pci_name(tp->pdev),
+                                       ioread32(ioaddr + CSR5),
+                                       ioread32(ioaddr + CSR6));
        }
 }
 
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