{
uwire_write_reg(UWIRE_SR3, 0);
clk_disable(uwire->ck);
- clk_put(uwire->ck);
spi_master_put(uwire->bitbang.master);
}
uwire = spi_master_get_devdata(master);
- uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
+ uwire_base = devm_ioremap(&pdev->dev, UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
if (!uwire_base) {
dev_dbg(&pdev->dev, "can't ioremap UWIRE\n");
spi_master_put(master);
platform_set_drvdata(pdev, uwire);
- uwire->ck = clk_get(&pdev->dev, "fck");
+ uwire->ck = devm_clk_get(&pdev->dev, "fck");
if (IS_ERR(uwire->ck)) {
status = PTR_ERR(uwire->ck);
dev_dbg(&pdev->dev, "no functional clock?\n");
spi_master_put(master);
- iounmap(uwire_base);
return status;
}
clk_enable(uwire->ck);
status = spi_bitbang_start(&uwire->bitbang);
if (status < 0) {
uwire_off(uwire);
- iounmap(uwire_base);
}
return status;
}
spi_bitbang_stop(&uwire->bitbang);
uwire_off(uwire);
- iounmap(uwire_base);
return 0;
}