spi: pxa2xx: Remove cr0 variable from struct chip_data
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Tue, 15 Sep 2015 13:26:28 +0000 (16:26 +0300)
committerMark Brown <broonie@kernel.org>
Thu, 17 Sep 2015 17:36:15 +0000 (18:36 +0100)
There hasn't been need to carry chip->cr0 after SPI core started to
validate speed_hz and bits_per_word transfer parameters. That effectively
caused that pump_transfers() always recalculated it and practically
chip->cr0 is used locally in setup() for debug prints only.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-pxa2xx.c
drivers/spi/spi-pxa2xx.h

index ebafd537b59f7c1f2792d1281242f6084c5c89e5..a25bc1d4bf7f59dcbc517ea2fdac9894cb8e2d8e 100644 (file)
@@ -1101,6 +1101,7 @@ static int setup(struct spi_device *spi)
        struct driver_data *drv_data = spi_master_get_devdata(spi->master);
        unsigned int clk_div;
        uint tx_thres, tx_hi_thres, rx_thres;
+       u32 cr0;
 
        switch (drv_data->ssp_type) {
        case QUARK_X1000_SSP:
@@ -1193,8 +1194,6 @@ static int setup(struct spi_device *spi)
 
        clk_div = pxa2xx_ssp_get_clk_div(drv_data, chip, spi->max_speed_hz);
 
-       chip->cr0 = pxa2xx_configure_sscr0(drv_data, clk_div,
-                                          spi->bits_per_word);
        switch (drv_data->ssp_type) {
        case QUARK_X1000_SSP:
                chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres)
@@ -1216,15 +1215,16 @@ static int setup(struct spi_device *spi)
                chip->cr1 |= SSCR1_LBM;
 
        /* NOTE:  PXA25x_SSP _could_ use external clocking ... */
+       cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, spi->bits_per_word);
        if (!pxa25x_ssp_comp(drv_data))
                dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
                        drv_data->max_clk_rate
-                               / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
+                               / (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)),
                        chip->enable_dma ? "DMA" : "PIO");
        else
                dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
                        drv_data->max_clk_rate / 2
-                               / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)),
+                               / (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)),
                        chip->enable_dma ? "DMA" : "PIO");
 
        if (spi->bits_per_word <= 8) {
@@ -1236,8 +1236,6 @@ static int setup(struct spi_device *spi)
                chip->read = u16_reader;
                chip->write = u16_writer;
        } else if (spi->bits_per_word <= 32) {
-               if (!is_quark_x1000_ssp(drv_data))
-                       chip->cr0 |= SSCR0_EDSS;
                chip->n_bytes = 4;
                chip->read = u32_reader;
                chip->write = u32_writer;
index 0875e985b90dcb9fb794cc579630a8513577682a..b91bda26bfa82c38f89e7cd82282b3da7243391f 100644 (file)
@@ -86,7 +86,6 @@ struct driver_data {
 };
 
 struct chip_data {
-       u32 cr0;
        u32 cr1;
        u32 dds_rate;
        u32 psp;
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