drm/i915/gen9: Add WaDisableMinuteIaClockGating

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 5eafd31fb4a683db58a71d2560df36ea911fbe20..e0601cc5a7952e55117bd8f8e47265047c088390 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -330,6 +330,13 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
        /* Enable MIA caching. GuC clock gating is disabled. */
        I915_WRITE(GUC_SHIM_CONTROL, GUC_SHIM_CONTROL_VALUE);
 
+       /* WaDisableMinuteIaClockGating:skl,bxt */
+       if ((IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) ||
+           (IS_BROXTON(dev) && INTEL_REVID(dev) == BXT_REVID_A0)) {
+               I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) &
+                                             ~GUC_ENABLE_MIA_CLOCK_GATING));
+       }
+
        /* WaC6DisallowByGfxPause*/
        I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);