drm/nouveau/ce: namespace + nvidia gpu names (no binary change)
authorBen Skeggs <bskeggs@redhat.com>
Wed, 14 Jan 2015 05:22:32 +0000 (15:22 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 22 Jan 2015 02:18:00 +0000 (12:18 +1000)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
21 files changed:
drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3 [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3 [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3 [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3 [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c

index 92cfcf5ae9d403246805d88d620476bd764d4171..7e29c52617ea3714c2d27c5f3c1653149fa85652 100644 (file)
@@ -2,13 +2,12 @@
 #define __NVKM_CE_H__
 #include <core/engine.h>
 
-void nva3_ce_intr(struct nouveau_subdev *);
-
-extern struct nouveau_oclass nva3_ce_oclass;
-extern struct nouveau_oclass nvc0_ce0_oclass;
-extern struct nouveau_oclass nvc0_ce1_oclass;
-extern struct nouveau_oclass nve0_ce0_oclass;
-extern struct nouveau_oclass nve0_ce1_oclass;
-extern struct nouveau_oclass nve0_ce2_oclass;
+void gt215_ce_intr(struct nvkm_subdev *);
 
+extern struct nvkm_oclass gt215_ce_oclass;
+extern struct nvkm_oclass gf100_ce0_oclass;
+extern struct nvkm_oclass gf100_ce1_oclass;
+extern struct nvkm_oclass gk104_ce0_oclass;
+extern struct nvkm_oclass gk104_ce1_oclass;
+extern struct nvkm_oclass gk104_ce2_oclass;
 #endif
index 834523d8420f170cb16bc2906cfa4cd69e518ab1..858797453e0bdc51f3b01e0c2c7d704864d09908 100644 (file)
@@ -1,3 +1,3 @@
-nvkm-y += nvkm/engine/ce/nva3.o
-nvkm-y += nvkm/engine/ce/nvc0.o
-nvkm-y += nvkm/engine/ce/nve0.o
+nvkm-y += nvkm/engine/ce/gt215.o
+nvkm-y += nvkm/engine/ce/gf100.o
+nvkm-y += nvkm/engine/ce/gk104.o
index fcc4ba172443c49e025299327791cf12f2b5d214..a558dfa4d76a228296bdb39a9d879abced033d1b 100644 (file)
@@ -1,4 +1,4 @@
-/* fuc microcode for copy engine on nva3- chipsets
+/* fuc microcode for copy engine on gt215- chipsets
  *
  * Copyright 2011 Red Hat Inc.
  *
  * Authors: Ben Skeggs
  */
 
-/* To build for nva3:nvc0
- *    m4 -DNVA3 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nva3_copy.fuc.h
- *
- * To build for nvc0-
- *    m4 -DNVC0 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_copy.fuc.h
- */
-
-#ifdef NVA3
-.section #nva3_pce_data
+#ifdef GT215
+.section #gt215_pce_data
 #else
-.section #nvc0_pce_data
+.section #gf100_pce_data
 #endif
 
 ctx_object:                   .b32 0
-#ifdef NVA3
+#ifdef GT215
 ctx_dma:
 ctx_dma_query:                .b32 0
 ctx_dma_src:                  .b32 0
@@ -86,7 +79,7 @@ dispatch_table:
 // mthd 0x0140, PM_TRIGGER
 .b16 0x050 1
 .b32 0x00010000 + #cmd_pm_trigger    ~0xffffffff
-#ifdef NVA3
+#ifdef GT215
 // mthd 0x0180-0x018c, DMA_
 .b16 0x060 #ctx_dma_count
 dispatch_dma:
@@ -134,10 +127,10 @@ dispatch_dma:
 .b32 #ctx_query_counter              ~0xffffffff
 .b16 0x800 0
 
-#ifdef NVA3
-.section #nva3_pce_code
+#ifdef GT215
+.section #gt215_pce_code
 #else
-.section #nvc0_pce_code
+.section #gf100_pce_code
 #endif
 
 main:
@@ -190,7 +183,7 @@ ih:
 swctx:
    mov $r4 0x7700
    mov $xtargets $r4
-#ifdef NVA3
+#ifdef GT215
    // target 7 hardcoded to ctx dma object
    mov $xdbase $r0
 #else
@@ -271,7 +264,7 @@ chsw:
    bra e #chsw_finish_load
       bset $flags $p1
       call #swctx
-#ifdef NVA3
+#ifdef GT215
       // load dma objects back into TARGET regs
       mov $r5 #ctx_dma
       mov $r6 #ctx_dma_count
@@ -396,7 +389,7 @@ cmd_pm_trigger:
    iowr I[$r2] $r3
    ret
 
-#ifdef NVA3
+#ifdef GT215
 // SET_DMA_* method handler
 //
 // Inputs:
@@ -547,7 +540,7 @@ cmd_exec_set_surface_tiled:
    ld b32 $r7 D[$r5 + #ctx_src_tile_mode]
    extr $r9 $r7 8:11
    extr $r8 $r7 4:7
-#ifdef NVA3
+#ifdef GT215
    add b32 $r8 2
 #else
    add b32 $r8 3
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3
new file mode 100644 (file)
index 0000000..36f0a99
--- /dev/null
@@ -0,0 +1,2 @@
+#define GF100
+#include "com.fuc"
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h
new file mode 100644 (file)
index 0000000..d9af6e4
--- /dev/null
@@ -0,0 +1,606 @@
+uint32_t gf100_pce_data[] = {
+/* 0x0000: ctx_object */
+       0x00000000,
+/* 0x0004: ctx_query_address_high */
+       0x00000000,
+/* 0x0008: ctx_query_address_low */
+       0x00000000,
+/* 0x000c: ctx_query_counter */
+       0x00000000,
+/* 0x0010: ctx_src_address_high */
+       0x00000000,
+/* 0x0014: ctx_src_address_low */
+       0x00000000,
+/* 0x0018: ctx_src_pitch */
+       0x00000000,
+/* 0x001c: ctx_src_tile_mode */
+       0x00000000,
+/* 0x0020: ctx_src_xsize */
+       0x00000000,
+/* 0x0024: ctx_src_ysize */
+       0x00000000,
+/* 0x0028: ctx_src_zsize */
+       0x00000000,
+/* 0x002c: ctx_src_zoff */
+       0x00000000,
+/* 0x0030: ctx_src_xoff */
+       0x00000000,
+/* 0x0034: ctx_src_yoff */
+       0x00000000,
+/* 0x0038: ctx_src_cpp */
+       0x00000000,
+/* 0x003c: ctx_dst_address_high */
+       0x00000000,
+/* 0x0040: ctx_dst_address_low */
+       0x00000000,
+/* 0x0044: ctx_dst_pitch */
+       0x00000000,
+/* 0x0048: ctx_dst_tile_mode */
+       0x00000000,
+/* 0x004c: ctx_dst_xsize */
+       0x00000000,
+/* 0x0050: ctx_dst_ysize */
+       0x00000000,
+/* 0x0054: ctx_dst_zsize */
+       0x00000000,
+/* 0x0058: ctx_dst_zoff */
+       0x00000000,
+/* 0x005c: ctx_dst_xoff */
+       0x00000000,
+/* 0x0060: ctx_dst_yoff */
+       0x00000000,
+/* 0x0064: ctx_dst_cpp */
+       0x00000000,
+/* 0x0068: ctx_format */
+       0x00000000,
+/* 0x006c: ctx_swz_const0 */
+       0x00000000,
+/* 0x0070: ctx_swz_const1 */
+       0x00000000,
+/* 0x0074: ctx_xcnt */
+       0x00000000,
+/* 0x0078: ctx_ycnt */
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+/* 0x0100: dispatch_table */
+       0x00010000,
+       0x00000000,
+       0x00000000,
+       0x00010040,
+       0x0001019f,
+       0x00000000,
+       0x00010050,
+       0x000101a1,
+       0x00000000,
+       0x00070080,
+       0x0000001c,
+       0xfffff000,
+       0x00000020,
+       0xfff80000,
+       0x00000024,
+       0xffffe000,
+       0x00000028,
+       0xfffff800,
+       0x0000002c,
+       0xfffff000,
+       0x00000030,
+       0xfff80000,
+       0x00000034,
+       0xffffe000,
+       0x00070088,
+       0x00000048,
+       0xfffff000,
+       0x0000004c,
+       0xfff80000,
+       0x00000050,
+       0xffffe000,
+       0x00000054,
+       0xfffff800,
+       0x00000058,
+       0xfffff000,
+       0x0000005c,
+       0xfff80000,
+       0x00000060,
+       0xffffe000,
+       0x000200c0,
+       0x000104b8,
+       0x00000000,
+       0x00010541,
+       0x00000000,
+       0x000e00c3,
+       0x00000010,
+       0xffffff00,
+       0x00000014,
+       0x00000000,
+       0x0000003c,
+       0xffffff00,
+       0x00000040,
+       0x00000000,
+       0x00000018,
+       0xfff80000,
+       0x00000044,
+       0xfff80000,
+       0x00000074,
+       0xffff0000,
+       0x00000078,
+       0xffffe000,
+       0x00000068,
+       0xfccc0000,
+       0x0000006c,
+       0x00000000,
+       0x00000070,
+       0x00000000,
+       0x00000004,
+       0xffffff00,
+       0x00000008,
+       0x00000000,
+       0x0000000c,
+       0x00000000,
+       0x00000800,
+};
+
+uint32_t gf100_pce_code[] = {
+/* 0x0000: main */
+       0x04fe04bd,
+       0x3517f000,
+       0xf10010fe,
+       0xf1040017,
+       0xf0fff327,
+       0x12d00023,
+       0x0c25f0c0,
+       0xf40012d0,
+       0x17f11031,
+       0x27f01200,
+       0x0012d003,
+/* 0x002f: spin */
+       0xf40031f4,
+       0x0ef40028,
+/* 0x0035: ih */
+       0x8001cffd,
+       0xf40812c4,
+       0x21f4060b,
+/* 0x0041: ih_no_chsw */
+       0x0412c4ca,
+       0xf5070bf4,
+/* 0x004b: ih_no_cmd */
+       0xc4010221,
+       0x01d00c11,
+/* 0x0053: swctx */
+       0xf101f840,
+       0xfe770047,
+       0x47f1004b,
+       0x44cf2100,
+       0x0144f000,
+       0xb60444b6,
+       0xf7f13040,
+       0xf4b6061c,
+       0x1457f106,
+       0x00f5d101,
+       0xb6043594,
+       0x57fe0250,
+       0x0145fe00,
+       0x010052b7,
+       0x00ff67f1,
+       0x56fd60bd,
+       0x0253f004,
+       0xf80545fa,
+       0x0053f003,
+       0xd100e7f0,
+       0x549800fe,
+       0x0845b600,
+       0xb6015698,
+       0x46fd1864,
+       0x0047fe05,
+       0xf00204b9,
+       0x01f40643,
+       0x0604fa09,
+/* 0x00c3: swctx_load */
+       0xfa060ef4,
+/* 0x00c6: swctx_done */
+       0x03f80504,
+/* 0x00ca: chsw */
+       0x27f100f8,
+       0x23cf1400,
+       0x1e3fc800,
+       0xf4170bf4,
+       0x21f40132,
+       0x1e3af053,
+       0xf00023d0,
+       0x24d00147,
+/* 0x00eb: chsw_no_unload */
+       0xcf00f880,
+       0x3dc84023,
+       0x090bf41e,
+       0xf40131f4,
+/* 0x00fa: chsw_finish_load */
+       0x37f05321,
+       0x8023d002,
+/* 0x0102: dispatch */
+       0x37f100f8,
+       0x32cf1900,
+       0x0033cf40,
+       0x07ff24e4,
+       0xf11024b6,
+       0xbd010057,
+/* 0x011b: dispatch_loop */
+       0x5874bd64,
+       0x57580056,
+       0x0450b601,
+       0xf40446b8,
+       0x76bb4d08,
+       0x0447b800,
+       0xbb0f08f4,
+       0x74b60276,
+       0x0057bb03,
+/* 0x013f: dispatch_valid_mthd */
+       0xbbdf0ef4,
+       0x44b60246,
+       0x0045bb03,
+       0xfd014598,
+       0x54b00453,
+       0x201bf400,
+       0x58004558,
+       0x64b00146,
+       0x091bf400,
+       0xf4005380,
+/* 0x0166: dispatch_cmd */
+       0x32f4300e,
+       0xf455f901,
+       0x0ef40c01,
+/* 0x0171: dispatch_invalid_bitfield */
+       0x0225f025,
+/* 0x0174: dispatch_illegal_mthd */
+/* 0x0177: dispatch_error */
+       0xf10125f0,
+       0xd0100047,
+       0x43d00042,
+       0x4027f040,
+/* 0x0187: hostirq_wait */
+       0xcf0002d0,
+       0x24f08002,
+       0x0024b040,
+/* 0x0193: dispatch_done */
+       0xf1f71bf4,
+       0xf01d0027,
+       0x23d00137,
+/* 0x019f: cmd_nop */
+       0xf800f800,
+/* 0x01a1: cmd_pm_trigger */
+       0x0027f100,
+       0xf034bd22,
+       0x23d00233,
+/* 0x01af: cmd_exec_set_format */
+       0xf400f800,
+       0x01b0f030,
+       0x0101b000,
+       0xb00201b0,
+       0x04980301,
+       0x3045c71a,
+       0xc70150b6,
+       0x60b63446,
+       0x3847c701,
+       0xf40170b6,
+       0x84bd0232,
+/* 0x01da: ncomp_loop */
+       0x4ac494bd,
+       0x0445b60f,
+/* 0x01e2: bpc_loop */
+       0xa430b4bd,
+       0x0f18f404,
+       0xbbc0a5ff,
+       0x31f400cb,
+       0x220ef402,
+/* 0x01f4: cmp_c0 */
+       0xf00c1bf4,
+       0xcbbb10c7,
+       0x160ef400,
+/* 0x0200: cmp_c1 */
+       0xf406a430,
+       0xc7f00c18,
+       0x00cbbb14,
+/* 0x020f: cmp_zero */
+       0xf1070ef4,
+/* 0x0213: bpc_next */
+       0x380080c7,
+       0x80b601c8,
+       0x01b0b601,
+       0xf404b5b8,
+       0x90b6c308,
+       0x0497b801,
+       0xfdb208f4,
+       0x06800065,
+       0x1d08980e,
+       0xf40068fd,
+       0x64bd0502,
+/* 0x023c: dst_xcnt */
+       0x800075fd,
+       0x78fd1907,
+       0x1057f100,
+       0x0654b608,
+       0xd00056d0,
+       0x50b74057,
+       0x06980800,
+       0x0162b619,
+       0x980864b6,
+       0x72b60e07,
+       0x0567fd01,
+       0xb70056d0,
+       0xb4010050,
+       0x56d00060,
+       0x0160b400,
+       0xb44056d0,
+       0x56d00260,
+       0x0360b480,
+       0xb7c056d0,
+       0x98040050,
+       0x56d01b06,
+       0x1c069800,
+       0xf44056d0,
+       0x00f81030,
+/* 0x029c: cmd_exec_set_surface_tiled */
+       0xc7075798,
+       0x78c76879,
+       0x0380b664,
+       0xb06077c7,
+       0x1bf40e76,
+       0x0477f009,
+/* 0x02b7: xtile64 */
+       0xf00f0ef4,
+       0x70b6027c,
+       0x0947fd11,
+/* 0x02c3: xtileok */
+       0x980677f0,
+       0x5b980c5a,
+       0x00abfd0e,
+       0xbb01b7f0,
+       0xb2b604b7,
+       0xc4abff01,
+       0x9805a7bb,
+       0xe7f00d5d,
+       0x04e8bb01,
+       0xff01e2b6,
+       0xd8bbb4de,
+       0x01e0b605,
+       0xbb0cef94,
+       0xfefd02eb,
+       0x026cf005,
+       0x020860b7,
+       0xd00864b6,
+       0xb7bb006f,
+       0x00cbbb04,
+       0x98085f98,
+       0xfbfd0e5b,
+       0x01b7f000,
+       0xb604b7bb,
+       0xfbbb01b2,
+       0x05f7bb00,
+       0x5f98f0f9,
+       0x01b7f009,
+       0xb604b8bb,
+       0xfbbb01b2,
+       0x05f8bb00,
+       0x78bbf0f9,
+       0x0282b600,
+       0xbb01b7f0,
+       0xb9bb04b8,
+       0x0b589804,
+       0xbb01e7f0,
+       0xe2b604e9,
+       0xf48eff01,
+       0xbb04f7bb,
+       0x79bb00cf,
+       0x0589bb00,
+       0x90fcf0fc,
+       0xbb00d9fd,
+       0x89fd00ad,
+       0x008ffd00,
+       0xbb00a8bb,
+       0x92b604a7,
+       0x0497bb01,
+       0x988069d0,
+       0x58980557,
+       0x00acbb04,
+       0xb6007abb,
+       0x84b60081,
+       0x058bfd10,
+       0x060062b7,
+       0xb70067d0,
+       0xd0040060,
+       0x00f80068,
+/* 0x03a8: cmd_exec_set_surface_linear */
+       0xb7026cf0,
+       0xb6020260,
+       0x57980864,
+       0x0067d005,
+       0x040060b7,
+       0xb6045798,
+       0x67d01074,
+       0x0060b700,
+       0x06579804,
+       0xf80067d0,
+/* 0x03d1: cmd_exec_wait */
+       0xf900f900,
+       0x0007f110,
+       0x0604b608,
+/* 0x03dc: loop */
+       0xf00001cf,
+       0x1bf40114,
+       0xfc10fcfa,
+/* 0x03eb: cmd_exec_query */
+       0xc800f800,
+       0x1bf40d34,
+       0xd121f570,
+       0x0c47f103,
+       0x0644b608,
+       0xb6020598,
+       0x45d00450,
+       0x4040d000,
+       0xd00c57f0,
+       0x40b78045,
+       0x05980400,
+       0x1054b601,
+       0xb70045d0,
+       0xf1050040,
+       0xf00b0057,
+       0x45d00153,
+       0x4057f100,
+       0x0154b640,
+       0x808053f1,
+       0xf14045d0,
+       0xf1111057,
+       0xd0131253,
+       0x57f18045,
+       0x53f11514,
+       0x45d01716,
+       0x0157f1c0,
+       0x0153f026,
+       0x080047f1,
+       0xd00644b6,
+/* 0x045e: query_counter */
+       0x21f50045,
+       0x47f103d1,
+       0x44b6080c,
+       0x02059806,
+       0xd00045d0,
+       0x57f04040,
+       0x8045d004,
+       0x040040b7,
+       0xb6010598,
+       0x45d01054,
+       0x0040b700,
+       0x0057f105,
+       0x0045d003,
+       0x111057f1,
+       0x131253f1,
+       0x984045d0,
+       0x40b70305,
+       0x45d00500,
+       0x0157f100,
+       0x0153f026,
+       0x080047f1,
+       0xd00644b6,
+       0x00f80045,
+/* 0x04b8: cmd_exec */
+       0x03d121f5,
+       0xf4003fc8,
+       0x21f50e0b,
+       0x47f101af,
+       0x0ef40200,
+/* 0x04cd: cmd_exec_no_format */
+       0x1067f11e,
+       0x0664b608,
+       0x800177f0,
+       0x07800e07,
+       0x1d079819,
+       0xd00067d0,
+       0x44bd4067,
+/* 0x04e8: cmd_exec_init_src_surface */
+       0xbd0232f4,
+       0x043fc854,
+       0xf50a0bf4,
+       0xf403a821,
+/* 0x04fa: src_tiled */
+       0x21f50a0e,
+       0x49f0029c,
+/* 0x0501: cmd_exec_init_dst_surface */
+       0x0231f407,
+       0xc82c57f0,
+       0x0bf4083f,
+       0xa821f50a,
+       0x0a0ef403,
+/* 0x0514: dst_tiled */
+       0x029c21f5,
+/* 0x051b: cmd_exec_kick */
+       0xf10849f0,
+       0xb6080057,
+       0x06980654,
+       0x4056d01e,
+       0xf14167f0,
+       0xfd440063,
+       0x54d00546,
+       0x0c3fc800,
+       0xf5070bf4,
+/* 0x053f: cmd_exec_done */
+       0xf803eb21,
+/* 0x0541: cmd_wrcache_flush */
+       0x0027f100,
+       0xf034bd22,
+       0x23d00133,
+       0x0000f800,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3
new file mode 100644 (file)
index 0000000..07bda93
--- /dev/null
@@ -0,0 +1,2 @@
+#define GT215
+#include "com.fuc"
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h
new file mode 100644 (file)
index 0000000..f42c0d0
--- /dev/null
@@ -0,0 +1,620 @@
+uint32_t gt215_pce_data[] = {
+/* 0x0000: ctx_object */
+       0x00000000,
+/* 0x0004: ctx_dma */
+/* 0x0004: ctx_dma_query */
+       0x00000000,
+/* 0x0008: ctx_dma_src */
+       0x00000000,
+/* 0x000c: ctx_dma_dst */
+       0x00000000,
+/* 0x0010: ctx_query_address_high */
+       0x00000000,
+/* 0x0014: ctx_query_address_low */
+       0x00000000,
+/* 0x0018: ctx_query_counter */
+       0x00000000,
+/* 0x001c: ctx_src_address_high */
+       0x00000000,
+/* 0x0020: ctx_src_address_low */
+       0x00000000,
+/* 0x0024: ctx_src_pitch */
+       0x00000000,
+/* 0x0028: ctx_src_tile_mode */
+       0x00000000,
+/* 0x002c: ctx_src_xsize */
+       0x00000000,
+/* 0x0030: ctx_src_ysize */
+       0x00000000,
+/* 0x0034: ctx_src_zsize */
+       0x00000000,
+/* 0x0038: ctx_src_zoff */
+       0x00000000,
+/* 0x003c: ctx_src_xoff */
+       0x00000000,
+/* 0x0040: ctx_src_yoff */
+       0x00000000,
+/* 0x0044: ctx_src_cpp */
+       0x00000000,
+/* 0x0048: ctx_dst_address_high */
+       0x00000000,
+/* 0x004c: ctx_dst_address_low */
+       0x00000000,
+/* 0x0050: ctx_dst_pitch */
+       0x00000000,
+/* 0x0054: ctx_dst_tile_mode */
+       0x00000000,
+/* 0x0058: ctx_dst_xsize */
+       0x00000000,
+/* 0x005c: ctx_dst_ysize */
+       0x00000000,
+/* 0x0060: ctx_dst_zsize */
+       0x00000000,
+/* 0x0064: ctx_dst_zoff */
+       0x00000000,
+/* 0x0068: ctx_dst_xoff */
+       0x00000000,
+/* 0x006c: ctx_dst_yoff */
+       0x00000000,
+/* 0x0070: ctx_dst_cpp */
+       0x00000000,
+/* 0x0074: ctx_format */
+       0x00000000,
+/* 0x0078: ctx_swz_const0 */
+       0x00000000,
+/* 0x007c: ctx_swz_const1 */
+       0x00000000,
+/* 0x0080: ctx_xcnt */
+       0x00000000,
+/* 0x0084: ctx_ycnt */
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+/* 0x0100: dispatch_table */
+       0x00010000,
+       0x00000000,
+       0x00000000,
+       0x00010040,
+       0x00010160,
+       0x00000000,
+       0x00010050,
+       0x00010162,
+       0x00000000,
+       0x00030060,
+/* 0x0128: dispatch_dma */
+       0x00010170,
+       0x00000000,
+       0x00010170,
+       0x00000000,
+       0x00010170,
+       0x00000000,
+       0x00070080,
+       0x00000028,
+       0xfffff000,
+       0x0000002c,
+       0xfff80000,
+       0x00000030,
+       0xffffe000,
+       0x00000034,
+       0xfffff800,
+       0x00000038,
+       0xfffff000,
+       0x0000003c,
+       0xfff80000,
+       0x00000040,
+       0xffffe000,
+       0x00070088,
+       0x00000054,
+       0xfffff000,
+       0x00000058,
+       0xfff80000,
+       0x0000005c,
+       0xffffe000,
+       0x00000060,
+       0xfffff800,
+       0x00000064,
+       0xfffff000,
+       0x00000068,
+       0xfff80000,
+       0x0000006c,
+       0xffffe000,
+       0x000200c0,
+       0x00010492,
+       0x00000000,
+       0x0001051b,
+       0x00000000,
+       0x000e00c3,
+       0x0000001c,
+       0xffffff00,
+       0x00000020,
+       0x00000000,
+       0x00000048,
+       0xffffff00,
+       0x0000004c,
+       0x00000000,
+       0x00000024,
+       0xfff80000,
+       0x00000050,
+       0xfff80000,
+       0x00000080,
+       0xffff0000,
+       0x00000084,
+       0xffffe000,
+       0x00000074,
+       0xfccc0000,
+       0x00000078,
+       0x00000000,
+       0x0000007c,
+       0x00000000,
+       0x00000010,
+       0xffffff00,
+       0x00000014,
+       0x00000000,
+       0x00000018,
+       0x00000000,
+       0x00000800,
+};
+
+uint32_t gt215_pce_code[] = {
+/* 0x0000: main */
+       0x04fe04bd,
+       0x3517f000,
+       0xf10010fe,
+       0xf1040017,
+       0xf0fff327,
+       0x12d00023,
+       0x0c25f0c0,
+       0xf40012d0,
+       0x17f11031,
+       0x27f01200,
+       0x0012d003,
+/* 0x002f: spin */
+       0xf40031f4,
+       0x0ef40028,
+/* 0x0035: ih */
+       0x8001cffd,
+       0xf40812c4,
+       0x21f4060b,
+/* 0x0041: ih_no_chsw */
+       0x0412c472,
+       0xf4060bf4,
+/* 0x004a: ih_no_cmd */
+       0x11c4c321,
+       0x4001d00c,
+/* 0x0052: swctx */
+       0x47f101f8,
+       0x4bfe7700,
+       0x0007fe00,
+       0xf00204b9,
+       0x01f40643,
+       0x0604fa09,
+/* 0x006b: swctx_load */
+       0xfa060ef4,
+/* 0x006e: swctx_done */
+       0x03f80504,
+/* 0x0072: chsw */
+       0x27f100f8,
+       0x23cf1400,
+       0x1e3fc800,
+       0xf4170bf4,
+       0x21f40132,
+       0x1e3af052,
+       0xf00023d0,
+       0x24d00147,
+/* 0x0093: chsw_no_unload */
+       0xcf00f880,
+       0x3dc84023,
+       0x220bf41e,
+       0xf40131f4,
+       0x57f05221,
+       0x0367f004,
+/* 0x00a8: chsw_load_ctx_dma */
+       0xa07856bc,
+       0xb6018068,
+       0x87d00884,
+       0x0162b600,
+/* 0x00bb: chsw_finish_load */
+       0xf0f018f4,
+       0x23d00237,
+/* 0x00c3: dispatch */
+       0xf100f880,
+       0xcf190037,
+       0x33cf4032,
+       0xff24e400,
+       0x1024b607,
+       0x010057f1,
+       0x74bd64bd,
+/* 0x00dc: dispatch_loop */
+       0x58005658,
+       0x50b60157,
+       0x0446b804,
+       0xbb4d08f4,
+       0x47b80076,
+       0x0f08f404,
+       0xb60276bb,
+       0x57bb0374,
+       0xdf0ef400,
+/* 0x0100: dispatch_valid_mthd */
+       0xb60246bb,
+       0x45bb0344,
+       0x01459800,
+       0xb00453fd,
+       0x1bf40054,
+       0x00455820,
+       0xb0014658,
+       0x1bf40064,
+       0x00538009,
+/* 0x0127: dispatch_cmd */
+       0xf4300ef4,
+       0x55f90132,
+       0xf40c01f4,
+/* 0x0132: dispatch_invalid_bitfield */
+       0x25f0250e,
+/* 0x0135: dispatch_illegal_mthd */
+       0x0125f002,
+/* 0x0138: dispatch_error */
+       0x100047f1,
+       0xd00042d0,
+       0x27f04043,
+       0x0002d040,
+/* 0x0148: hostirq_wait */
+       0xf08002cf,
+       0x24b04024,
+       0xf71bf400,
+/* 0x0154: dispatch_done */
+       0x1d0027f1,
+       0xd00137f0,
+       0x00f80023,
+/* 0x0160: cmd_nop */
+/* 0x0162: cmd_pm_trigger */
+       0x27f100f8,
+       0x34bd2200,
+       0xd00233f0,
+       0x00f80023,
+/* 0x0170: cmd_dma */
+       0x012842b7,
+       0xf00145b6,
+       0x43801e39,
+       0x0040b701,
+       0x0644b606,
+       0xf80043d0,
+/* 0x0189: cmd_exec_set_format */
+       0xf030f400,
+       0xb00001b0,
+       0x01b00101,
+       0x0301b002,
+       0xc71d0498,
+       0x50b63045,
+       0x3446c701,
+       0xc70160b6,
+       0x70b63847,
+       0x0232f401,
+       0x94bd84bd,
+/* 0x01b4: ncomp_loop */
+       0xb60f4ac4,
+       0xb4bd0445,
+/* 0x01bc: bpc_loop */
+       0xf404a430,
+       0xa5ff0f18,
+       0x00cbbbc0,
+       0xf40231f4,
+/* 0x01ce: cmp_c0 */
+       0x1bf4220e,
+       0x10c7f00c,
+       0xf400cbbb,
+/* 0x01da: cmp_c1 */
+       0xa430160e,
+       0x0c18f406,
+       0xbb14c7f0,
+       0x0ef400cb,
+/* 0x01e9: cmp_zero */
+       0x80c7f107,
+/* 0x01ed: bpc_next */
+       0x01c83800,
+       0xb60180b6,
+       0xb5b801b0,
+       0xc308f404,
+       0xb80190b6,
+       0x08f40497,
+       0x0065fdb2,
+       0x98110680,
+       0x68fd2008,
+       0x0502f400,
+/* 0x0216: dst_xcnt */
+       0x75fd64bd,
+       0x1c078000,
+       0xf10078fd,
+       0xb6081057,
+       0x56d00654,
+       0x4057d000,
+       0x080050b7,
+       0xb61c0698,
+       0x64b60162,
+       0x11079808,
+       0xfd0172b6,
+       0x56d00567,
+       0x0050b700,
+       0x0060b401,
+       0xb40056d0,
+       0x56d00160,
+       0x0260b440,
+       0xb48056d0,
+       0x56d00360,
+       0x0050b7c0,
+       0x1e069804,
+       0x980056d0,
+       0x56d01f06,
+       0x1030f440,
+/* 0x0276: cmd_exec_set_surface_tiled */
+       0x579800f8,
+       0x6879c70a,
+       0xb66478c7,
+       0x77c70280,
+       0x0e76b060,
+       0xf0091bf4,
+       0x0ef40477,
+/* 0x0291: xtile64 */
+       0x027cf00f,
+       0xfd1170b6,
+       0x77f00947,
+/* 0x029d: xtileok */
+       0x0f5a9806,
+       0xfd115b98,
+       0xb7f000ab,
+       0x04b7bb01,
+       0xff01b2b6,
+       0xa7bbc4ab,
+       0x105d9805,
+       0xbb01e7f0,
+       0xe2b604e8,
+       0xb4deff01,
+       0xb605d8bb,
+       0xef9401e0,
+       0x02ebbb0c,
+       0xf005fefd,
+       0x60b7026c,
+       0x64b60208,
+       0x006fd008,
+       0xbb04b7bb,
+       0x5f9800cb,
+       0x115b980b,
+       0xf000fbfd,
+       0xb7bb01b7,
+       0x01b2b604,
+       0xbb00fbbb,
+       0xf0f905f7,
+       0xf00c5f98,
+       0xb8bb01b7,
+       0x01b2b604,
+       0xbb00fbbb,
+       0xf0f905f8,
+       0xb60078bb,
+       0xb7f00282,
+       0x04b8bb01,
+       0x9804b9bb,
+       0xe7f00e58,
+       0x04e9bb01,
+       0xff01e2b6,
+       0xf7bbf48e,
+       0x00cfbb04,
+       0xbb0079bb,
+       0xf0fc0589,
+       0xd9fd90fc,
+       0x00adbb00,
+       0xfd0089fd,
+       0xa8bb008f,
+       0x04a7bb00,
+       0xbb0192b6,
+       0x69d00497,
+       0x08579880,
+       0xbb075898,
+       0x7abb00ac,
+       0x0081b600,
+       0xfd1084b6,
+       0x62b7058b,
+       0x67d00600,
+       0x0060b700,
+       0x0068d004,
+/* 0x0382: cmd_exec_set_surface_linear */
+       0x6cf000f8,
+       0x0260b702,
+       0x0864b602,
+       0xd0085798,
+       0x60b70067,
+       0x57980400,
+       0x1074b607,
+       0xb70067d0,
+       0x98040060,
+       0x67d00957,
+/* 0x03ab: cmd_exec_wait */
+       0xf900f800,
+       0xf110f900,
+       0xb6080007,
+/* 0x03b6: loop */
+       0x01cf0604,
+       0x0114f000,
+       0xfcfa1bf4,
+       0xf800fc10,
+/* 0x03c5: cmd_exec_query */
+       0x0d34c800,
+       0xf5701bf4,
+       0xf103ab21,
+       0xb6080c47,
+       0x05980644,
+       0x0450b605,
+       0xd00045d0,
+       0x57f04040,
+       0x8045d00c,
+       0x040040b7,
+       0xb6040598,
+       0x45d01054,
+       0x0040b700,
+       0x0057f105,
+       0x0153f00b,
+       0xf10045d0,
+       0xb6404057,
+       0x53f10154,
+       0x45d08080,
+       0x1057f140,
+       0x1253f111,
+       0x8045d013,
+       0x151457f1,
+       0x171653f1,
+       0xf1c045d0,
+       0xf0260157,
+       0x47f10153,
+       0x44b60800,
+       0x0045d006,
+/* 0x0438: query_counter */
+       0x03ab21f5,
+       0x080c47f1,
+       0x980644b6,
+       0x45d00505,
+       0x4040d000,
+       0xd00457f0,
+       0x40b78045,
+       0x05980400,
+       0x1054b604,
+       0xb70045d0,
+       0xf1050040,
+       0xd0030057,
+       0x57f10045,
+       0x53f11110,
+       0x45d01312,
+       0x06059840,
+       0x050040b7,
+       0xf10045d0,
+       0xf0260157,
+       0x47f10153,
+       0x44b60800,
+       0x0045d006,
+/* 0x0492: cmd_exec */
+       0x21f500f8,
+       0x3fc803ab,
+       0x0e0bf400,
+       0x018921f5,
+       0x020047f1,
+/* 0x04a7: cmd_exec_no_format */
+       0xf11e0ef4,
+       0xb6081067,
+       0x77f00664,
+       0x11078001,
+       0x981c0780,
+       0x67d02007,
+       0x4067d000,
+/* 0x04c2: cmd_exec_init_src_surface */
+       0x32f444bd,
+       0xc854bd02,
+       0x0bf4043f,
+       0x8221f50a,
+       0x0a0ef403,
+/* 0x04d4: src_tiled */
+       0x027621f5,
+/* 0x04db: cmd_exec_init_dst_surface */
+       0xf40749f0,
+       0x57f00231,
+       0x083fc82c,
+       0xf50a0bf4,
+       0xf4038221,
+/* 0x04ee: dst_tiled */
+       0x21f50a0e,
+       0x49f00276,
+/* 0x04f5: cmd_exec_kick */
+       0x0057f108,
+       0x0654b608,
+       0xd0210698,
+       0x67f04056,
+       0x0063f141,
+       0x0546fd44,
+       0xc80054d0,
+       0x0bf40c3f,
+       0xc521f507,
+/* 0x0519: cmd_exec_done */
+/* 0x051b: cmd_wrcache_flush */
+       0xf100f803,
+       0xbd220027,
+       0x0133f034,
+       0xf80023d0,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3
deleted file mode 100644 (file)
index e670620..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-#define NVA3
-#include "com.fuc"
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h
deleted file mode 100644 (file)
index 362872d..0000000
+++ /dev/null
@@ -1,620 +0,0 @@
-uint32_t nva3_pce_data[] = {
-/* 0x0000: ctx_object */
-       0x00000000,
-/* 0x0004: ctx_dma */
-/* 0x0004: ctx_dma_query */
-       0x00000000,
-/* 0x0008: ctx_dma_src */
-       0x00000000,
-/* 0x000c: ctx_dma_dst */
-       0x00000000,
-/* 0x0010: ctx_query_address_high */
-       0x00000000,
-/* 0x0014: ctx_query_address_low */
-       0x00000000,
-/* 0x0018: ctx_query_counter */
-       0x00000000,
-/* 0x001c: ctx_src_address_high */
-       0x00000000,
-/* 0x0020: ctx_src_address_low */
-       0x00000000,
-/* 0x0024: ctx_src_pitch */
-       0x00000000,
-/* 0x0028: ctx_src_tile_mode */
-       0x00000000,
-/* 0x002c: ctx_src_xsize */
-       0x00000000,
-/* 0x0030: ctx_src_ysize */
-       0x00000000,
-/* 0x0034: ctx_src_zsize */
-       0x00000000,
-/* 0x0038: ctx_src_zoff */
-       0x00000000,
-/* 0x003c: ctx_src_xoff */
-       0x00000000,
-/* 0x0040: ctx_src_yoff */
-       0x00000000,
-/* 0x0044: ctx_src_cpp */
-       0x00000000,
-/* 0x0048: ctx_dst_address_high */
-       0x00000000,
-/* 0x004c: ctx_dst_address_low */
-       0x00000000,
-/* 0x0050: ctx_dst_pitch */
-       0x00000000,
-/* 0x0054: ctx_dst_tile_mode */
-       0x00000000,
-/* 0x0058: ctx_dst_xsize */
-       0x00000000,
-/* 0x005c: ctx_dst_ysize */
-       0x00000000,
-/* 0x0060: ctx_dst_zsize */
-       0x00000000,
-/* 0x0064: ctx_dst_zoff */
-       0x00000000,
-/* 0x0068: ctx_dst_xoff */
-       0x00000000,
-/* 0x006c: ctx_dst_yoff */
-       0x00000000,
-/* 0x0070: ctx_dst_cpp */
-       0x00000000,
-/* 0x0074: ctx_format */
-       0x00000000,
-/* 0x0078: ctx_swz_const0 */
-       0x00000000,
-/* 0x007c: ctx_swz_const1 */
-       0x00000000,
-/* 0x0080: ctx_xcnt */
-       0x00000000,
-/* 0x0084: ctx_ycnt */
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-/* 0x0100: dispatch_table */
-       0x00010000,
-       0x00000000,
-       0x00000000,
-       0x00010040,
-       0x00010160,
-       0x00000000,
-       0x00010050,
-       0x00010162,
-       0x00000000,
-       0x00030060,
-/* 0x0128: dispatch_dma */
-       0x00010170,
-       0x00000000,
-       0x00010170,
-       0x00000000,
-       0x00010170,
-       0x00000000,
-       0x00070080,
-       0x00000028,
-       0xfffff000,
-       0x0000002c,
-       0xfff80000,
-       0x00000030,
-       0xffffe000,
-       0x00000034,
-       0xfffff800,
-       0x00000038,
-       0xfffff000,
-       0x0000003c,
-       0xfff80000,
-       0x00000040,
-       0xffffe000,
-       0x00070088,
-       0x00000054,
-       0xfffff000,
-       0x00000058,
-       0xfff80000,
-       0x0000005c,
-       0xffffe000,
-       0x00000060,
-       0xfffff800,
-       0x00000064,
-       0xfffff000,
-       0x00000068,
-       0xfff80000,
-       0x0000006c,
-       0xffffe000,
-       0x000200c0,
-       0x00010492,
-       0x00000000,
-       0x0001051b,
-       0x00000000,
-       0x000e00c3,
-       0x0000001c,
-       0xffffff00,
-       0x00000020,
-       0x00000000,
-       0x00000048,
-       0xffffff00,
-       0x0000004c,
-       0x00000000,
-       0x00000024,
-       0xfff80000,
-       0x00000050,
-       0xfff80000,
-       0x00000080,
-       0xffff0000,
-       0x00000084,
-       0xffffe000,
-       0x00000074,
-       0xfccc0000,
-       0x00000078,
-       0x00000000,
-       0x0000007c,
-       0x00000000,
-       0x00000010,
-       0xffffff00,
-       0x00000014,
-       0x00000000,
-       0x00000018,
-       0x00000000,
-       0x00000800,
-};
-
-uint32_t nva3_pce_code[] = {
-/* 0x0000: main */
-       0x04fe04bd,
-       0x3517f000,
-       0xf10010fe,
-       0xf1040017,
-       0xf0fff327,
-       0x12d00023,
-       0x0c25f0c0,
-       0xf40012d0,
-       0x17f11031,
-       0x27f01200,
-       0x0012d003,
-/* 0x002f: spin */
-       0xf40031f4,
-       0x0ef40028,
-/* 0x0035: ih */
-       0x8001cffd,
-       0xf40812c4,
-       0x21f4060b,
-/* 0x0041: ih_no_chsw */
-       0x0412c472,
-       0xf4060bf4,
-/* 0x004a: ih_no_cmd */
-       0x11c4c321,
-       0x4001d00c,
-/* 0x0052: swctx */
-       0x47f101f8,
-       0x4bfe7700,
-       0x0007fe00,
-       0xf00204b9,
-       0x01f40643,
-       0x0604fa09,
-/* 0x006b: swctx_load */
-       0xfa060ef4,
-/* 0x006e: swctx_done */
-       0x03f80504,
-/* 0x0072: chsw */
-       0x27f100f8,
-       0x23cf1400,
-       0x1e3fc800,
-       0xf4170bf4,
-       0x21f40132,
-       0x1e3af052,
-       0xf00023d0,
-       0x24d00147,
-/* 0x0093: chsw_no_unload */
-       0xcf00f880,
-       0x3dc84023,
-       0x220bf41e,
-       0xf40131f4,
-       0x57f05221,
-       0x0367f004,
-/* 0x00a8: chsw_load_ctx_dma */
-       0xa07856bc,
-       0xb6018068,
-       0x87d00884,
-       0x0162b600,
-/* 0x00bb: chsw_finish_load */
-       0xf0f018f4,
-       0x23d00237,
-/* 0x00c3: dispatch */
-       0xf100f880,
-       0xcf190037,
-       0x33cf4032,
-       0xff24e400,
-       0x1024b607,
-       0x010057f1,
-       0x74bd64bd,
-/* 0x00dc: dispatch_loop */
-       0x58005658,
-       0x50b60157,
-       0x0446b804,
-       0xbb4d08f4,
-       0x47b80076,
-       0x0f08f404,
-       0xb60276bb,
-       0x57bb0374,
-       0xdf0ef400,
-/* 0x0100: dispatch_valid_mthd */
-       0xb60246bb,
-       0x45bb0344,
-       0x01459800,
-       0xb00453fd,
-       0x1bf40054,
-       0x00455820,
-       0xb0014658,
-       0x1bf40064,
-       0x00538009,
-/* 0x0127: dispatch_cmd */
-       0xf4300ef4,
-       0x55f90132,
-       0xf40c01f4,
-/* 0x0132: dispatch_invalid_bitfield */
-       0x25f0250e,
-/* 0x0135: dispatch_illegal_mthd */
-       0x0125f002,
-/* 0x0138: dispatch_error */
-       0x100047f1,
-       0xd00042d0,
-       0x27f04043,
-       0x0002d040,
-/* 0x0148: hostirq_wait */
-       0xf08002cf,
-       0x24b04024,
-       0xf71bf400,
-/* 0x0154: dispatch_done */
-       0x1d0027f1,
-       0xd00137f0,
-       0x00f80023,
-/* 0x0160: cmd_nop */
-/* 0x0162: cmd_pm_trigger */
-       0x27f100f8,
-       0x34bd2200,
-       0xd00233f0,
-       0x00f80023,
-/* 0x0170: cmd_dma */
-       0x012842b7,
-       0xf00145b6,
-       0x43801e39,
-       0x0040b701,
-       0x0644b606,
-       0xf80043d0,
-/* 0x0189: cmd_exec_set_format */
-       0xf030f400,
-       0xb00001b0,
-       0x01b00101,
-       0x0301b002,
-       0xc71d0498,
-       0x50b63045,
-       0x3446c701,
-       0xc70160b6,
-       0x70b63847,
-       0x0232f401,
-       0x94bd84bd,
-/* 0x01b4: ncomp_loop */
-       0xb60f4ac4,
-       0xb4bd0445,
-/* 0x01bc: bpc_loop */
-       0xf404a430,
-       0xa5ff0f18,
-       0x00cbbbc0,
-       0xf40231f4,
-/* 0x01ce: cmp_c0 */
-       0x1bf4220e,
-       0x10c7f00c,
-       0xf400cbbb,
-/* 0x01da: cmp_c1 */
-       0xa430160e,
-       0x0c18f406,
-       0xbb14c7f0,
-       0x0ef400cb,
-/* 0x01e9: cmp_zero */
-       0x80c7f107,
-/* 0x01ed: bpc_next */
-       0x01c83800,
-       0xb60180b6,
-       0xb5b801b0,
-       0xc308f404,
-       0xb80190b6,
-       0x08f40497,
-       0x0065fdb2,
-       0x98110680,
-       0x68fd2008,
-       0x0502f400,
-/* 0x0216: dst_xcnt */
-       0x75fd64bd,
-       0x1c078000,
-       0xf10078fd,
-       0xb6081057,
-       0x56d00654,
-       0x4057d000,
-       0x080050b7,
-       0xb61c0698,
-       0x64b60162,
-       0x11079808,
-       0xfd0172b6,
-       0x56d00567,
-       0x0050b700,
-       0x0060b401,
-       0xb40056d0,
-       0x56d00160,
-       0x0260b440,
-       0xb48056d0,
-       0x56d00360,
-       0x0050b7c0,
-       0x1e069804,
-       0x980056d0,
-       0x56d01f06,
-       0x1030f440,
-/* 0x0276: cmd_exec_set_surface_tiled */
-       0x579800f8,
-       0x6879c70a,
-       0xb66478c7,
-       0x77c70280,
-       0x0e76b060,
-       0xf0091bf4,
-       0x0ef40477,
-/* 0x0291: xtile64 */
-       0x027cf00f,
-       0xfd1170b6,
-       0x77f00947,
-/* 0x029d: xtileok */
-       0x0f5a9806,
-       0xfd115b98,
-       0xb7f000ab,
-       0x04b7bb01,
-       0xff01b2b6,
-       0xa7bbc4ab,
-       0x105d9805,
-       0xbb01e7f0,
-       0xe2b604e8,
-       0xb4deff01,
-       0xb605d8bb,
-       0xef9401e0,
-       0x02ebbb0c,
-       0xf005fefd,
-       0x60b7026c,
-       0x64b60208,
-       0x006fd008,
-       0xbb04b7bb,
-       0x5f9800cb,
-       0x115b980b,
-       0xf000fbfd,
-       0xb7bb01b7,
-       0x01b2b604,
-       0xbb00fbbb,
-       0xf0f905f7,
-       0xf00c5f98,
-       0xb8bb01b7,
-       0x01b2b604,
-       0xbb00fbbb,
-       0xf0f905f8,
-       0xb60078bb,
-       0xb7f00282,
-       0x04b8bb01,
-       0x9804b9bb,
-       0xe7f00e58,
-       0x04e9bb01,
-       0xff01e2b6,
-       0xf7bbf48e,
-       0x00cfbb04,
-       0xbb0079bb,
-       0xf0fc0589,
-       0xd9fd90fc,
-       0x00adbb00,
-       0xfd0089fd,
-       0xa8bb008f,
-       0x04a7bb00,
-       0xbb0192b6,
-       0x69d00497,
-       0x08579880,
-       0xbb075898,
-       0x7abb00ac,
-       0x0081b600,
-       0xfd1084b6,
-       0x62b7058b,
-       0x67d00600,
-       0x0060b700,
-       0x0068d004,
-/* 0x0382: cmd_exec_set_surface_linear */
-       0x6cf000f8,
-       0x0260b702,
-       0x0864b602,
-       0xd0085798,
-       0x60b70067,
-       0x57980400,
-       0x1074b607,
-       0xb70067d0,
-       0x98040060,
-       0x67d00957,
-/* 0x03ab: cmd_exec_wait */
-       0xf900f800,
-       0xf110f900,
-       0xb6080007,
-/* 0x03b6: loop */
-       0x01cf0604,
-       0x0114f000,
-       0xfcfa1bf4,
-       0xf800fc10,
-/* 0x03c5: cmd_exec_query */
-       0x0d34c800,
-       0xf5701bf4,
-       0xf103ab21,
-       0xb6080c47,
-       0x05980644,
-       0x0450b605,
-       0xd00045d0,
-       0x57f04040,
-       0x8045d00c,
-       0x040040b7,
-       0xb6040598,
-       0x45d01054,
-       0x0040b700,
-       0x0057f105,
-       0x0153f00b,
-       0xf10045d0,
-       0xb6404057,
-       0x53f10154,
-       0x45d08080,
-       0x1057f140,
-       0x1253f111,
-       0x8045d013,
-       0x151457f1,
-       0x171653f1,
-       0xf1c045d0,
-       0xf0260157,
-       0x47f10153,
-       0x44b60800,
-       0x0045d006,
-/* 0x0438: query_counter */
-       0x03ab21f5,
-       0x080c47f1,
-       0x980644b6,
-       0x45d00505,
-       0x4040d000,
-       0xd00457f0,
-       0x40b78045,
-       0x05980400,
-       0x1054b604,
-       0xb70045d0,
-       0xf1050040,
-       0xd0030057,
-       0x57f10045,
-       0x53f11110,
-       0x45d01312,
-       0x06059840,
-       0x050040b7,
-       0xf10045d0,
-       0xf0260157,
-       0x47f10153,
-       0x44b60800,
-       0x0045d006,
-/* 0x0492: cmd_exec */
-       0x21f500f8,
-       0x3fc803ab,
-       0x0e0bf400,
-       0x018921f5,
-       0x020047f1,
-/* 0x04a7: cmd_exec_no_format */
-       0xf11e0ef4,
-       0xb6081067,
-       0x77f00664,
-       0x11078001,
-       0x981c0780,
-       0x67d02007,
-       0x4067d000,
-/* 0x04c2: cmd_exec_init_src_surface */
-       0x32f444bd,
-       0xc854bd02,
-       0x0bf4043f,
-       0x8221f50a,
-       0x0a0ef403,
-/* 0x04d4: src_tiled */
-       0x027621f5,
-/* 0x04db: cmd_exec_init_dst_surface */
-       0xf40749f0,
-       0x57f00231,
-       0x083fc82c,
-       0xf50a0bf4,
-       0xf4038221,
-/* 0x04ee: dst_tiled */
-       0x21f50a0e,
-       0x49f00276,
-/* 0x04f5: cmd_exec_kick */
-       0x0057f108,
-       0x0654b608,
-       0xd0210698,
-       0x67f04056,
-       0x0063f141,
-       0x0546fd44,
-       0xc80054d0,
-       0x0bf40c3f,
-       0xc521f507,
-/* 0x0519: cmd_exec_done */
-/* 0x051b: cmd_wrcache_flush */
-       0xf100f803,
-       0xbd220027,
-       0x0133f034,
-       0xf80023d0,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3
deleted file mode 100644 (file)
index df6866c..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-#define NVC0
-#include "com.fuc"
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h
deleted file mode 100644 (file)
index 042257d..0000000
+++ /dev/null
@@ -1,606 +0,0 @@
-uint32_t nvc0_pce_data[] = {
-/* 0x0000: ctx_object */
-       0x00000000,
-/* 0x0004: ctx_query_address_high */
-       0x00000000,
-/* 0x0008: ctx_query_address_low */
-       0x00000000,
-/* 0x000c: ctx_query_counter */
-       0x00000000,
-/* 0x0010: ctx_src_address_high */
-       0x00000000,
-/* 0x0014: ctx_src_address_low */
-       0x00000000,
-/* 0x0018: ctx_src_pitch */
-       0x00000000,
-/* 0x001c: ctx_src_tile_mode */
-       0x00000000,
-/* 0x0020: ctx_src_xsize */
-       0x00000000,
-/* 0x0024: ctx_src_ysize */
-       0x00000000,
-/* 0x0028: ctx_src_zsize */
-       0x00000000,
-/* 0x002c: ctx_src_zoff */
-       0x00000000,
-/* 0x0030: ctx_src_xoff */
-       0x00000000,
-/* 0x0034: ctx_src_yoff */
-       0x00000000,
-/* 0x0038: ctx_src_cpp */
-       0x00000000,
-/* 0x003c: ctx_dst_address_high */
-       0x00000000,
-/* 0x0040: ctx_dst_address_low */
-       0x00000000,
-/* 0x0044: ctx_dst_pitch */
-       0x00000000,
-/* 0x0048: ctx_dst_tile_mode */
-       0x00000000,
-/* 0x004c: ctx_dst_xsize */
-       0x00000000,
-/* 0x0050: ctx_dst_ysize */
-       0x00000000,
-/* 0x0054: ctx_dst_zsize */
-       0x00000000,
-/* 0x0058: ctx_dst_zoff */
-       0x00000000,
-/* 0x005c: ctx_dst_xoff */
-       0x00000000,
-/* 0x0060: ctx_dst_yoff */
-       0x00000000,
-/* 0x0064: ctx_dst_cpp */
-       0x00000000,
-/* 0x0068: ctx_format */
-       0x00000000,
-/* 0x006c: ctx_swz_const0 */
-       0x00000000,
-/* 0x0070: ctx_swz_const1 */
-       0x00000000,
-/* 0x0074: ctx_xcnt */
-       0x00000000,
-/* 0x0078: ctx_ycnt */
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-/* 0x0100: dispatch_table */
-       0x00010000,
-       0x00000000,
-       0x00000000,
-       0x00010040,
-       0x0001019f,
-       0x00000000,
-       0x00010050,
-       0x000101a1,
-       0x00000000,
-       0x00070080,
-       0x0000001c,
-       0xfffff000,
-       0x00000020,
-       0xfff80000,
-       0x00000024,
-       0xffffe000,
-       0x00000028,
-       0xfffff800,
-       0x0000002c,
-       0xfffff000,
-       0x00000030,
-       0xfff80000,
-       0x00000034,
-       0xffffe000,
-       0x00070088,
-       0x00000048,
-       0xfffff000,
-       0x0000004c,
-       0xfff80000,
-       0x00000050,
-       0xffffe000,
-       0x00000054,
-       0xfffff800,
-       0x00000058,
-       0xfffff000,
-       0x0000005c,
-       0xfff80000,
-       0x00000060,
-       0xffffe000,
-       0x000200c0,
-       0x000104b8,
-       0x00000000,
-       0x00010541,
-       0x00000000,
-       0x000e00c3,
-       0x00000010,
-       0xffffff00,
-       0x00000014,
-       0x00000000,
-       0x0000003c,
-       0xffffff00,
-       0x00000040,
-       0x00000000,
-       0x00000018,
-       0xfff80000,
-       0x00000044,
-       0xfff80000,
-       0x00000074,
-       0xffff0000,
-       0x00000078,
-       0xffffe000,
-       0x00000068,
-       0xfccc0000,
-       0x0000006c,
-       0x00000000,
-       0x00000070,
-       0x00000000,
-       0x00000004,
-       0xffffff00,
-       0x00000008,
-       0x00000000,
-       0x0000000c,
-       0x00000000,
-       0x00000800,
-};
-
-uint32_t nvc0_pce_code[] = {
-/* 0x0000: main */
-       0x04fe04bd,
-       0x3517f000,
-       0xf10010fe,
-       0xf1040017,
-       0xf0fff327,
-       0x12d00023,
-       0x0c25f0c0,
-       0xf40012d0,
-       0x17f11031,
-       0x27f01200,
-       0x0012d003,
-/* 0x002f: spin */
-       0xf40031f4,
-       0x0ef40028,
-/* 0x0035: ih */
-       0x8001cffd,
-       0xf40812c4,
-       0x21f4060b,
-/* 0x0041: ih_no_chsw */
-       0x0412c4ca,
-       0xf5070bf4,
-/* 0x004b: ih_no_cmd */
-       0xc4010221,
-       0x01d00c11,
-/* 0x0053: swctx */
-       0xf101f840,
-       0xfe770047,
-       0x47f1004b,
-       0x44cf2100,
-       0x0144f000,
-       0xb60444b6,
-       0xf7f13040,
-       0xf4b6061c,
-       0x1457f106,
-       0x00f5d101,
-       0xb6043594,
-       0x57fe0250,
-       0x0145fe00,
-       0x010052b7,
-       0x00ff67f1,
-       0x56fd60bd,
-       0x0253f004,
-       0xf80545fa,
-       0x0053f003,
-       0xd100e7f0,
-       0x549800fe,
-       0x0845b600,
-       0xb6015698,
-       0x46fd1864,
-       0x0047fe05,
-       0xf00204b9,
-       0x01f40643,
-       0x0604fa09,
-/* 0x00c3: swctx_load */
-       0xfa060ef4,
-/* 0x00c6: swctx_done */
-       0x03f80504,
-/* 0x00ca: chsw */
-       0x27f100f8,
-       0x23cf1400,
-       0x1e3fc800,
-       0xf4170bf4,
-       0x21f40132,
-       0x1e3af053,
-       0xf00023d0,
-       0x24d00147,
-/* 0x00eb: chsw_no_unload */
-       0xcf00f880,
-       0x3dc84023,
-       0x090bf41e,
-       0xf40131f4,
-/* 0x00fa: chsw_finish_load */
-       0x37f05321,
-       0x8023d002,
-/* 0x0102: dispatch */
-       0x37f100f8,
-       0x32cf1900,
-       0x0033cf40,
-       0x07ff24e4,
-       0xf11024b6,
-       0xbd010057,
-/* 0x011b: dispatch_loop */
-       0x5874bd64,
-       0x57580056,
-       0x0450b601,
-       0xf40446b8,
-       0x76bb4d08,
-       0x0447b800,
-       0xbb0f08f4,
-       0x74b60276,
-       0x0057bb03,
-/* 0x013f: dispatch_valid_mthd */
-       0xbbdf0ef4,
-       0x44b60246,
-       0x0045bb03,
-       0xfd014598,
-       0x54b00453,
-       0x201bf400,
-       0x58004558,
-       0x64b00146,
-       0x091bf400,
-       0xf4005380,
-/* 0x0166: dispatch_cmd */
-       0x32f4300e,
-       0xf455f901,
-       0x0ef40c01,
-/* 0x0171: dispatch_invalid_bitfield */
-       0x0225f025,
-/* 0x0174: dispatch_illegal_mthd */
-/* 0x0177: dispatch_error */
-       0xf10125f0,
-       0xd0100047,
-       0x43d00042,
-       0x4027f040,
-/* 0x0187: hostirq_wait */
-       0xcf0002d0,
-       0x24f08002,
-       0x0024b040,
-/* 0x0193: dispatch_done */
-       0xf1f71bf4,
-       0xf01d0027,
-       0x23d00137,
-/* 0x019f: cmd_nop */
-       0xf800f800,
-/* 0x01a1: cmd_pm_trigger */
-       0x0027f100,
-       0xf034bd22,
-       0x23d00233,
-/* 0x01af: cmd_exec_set_format */
-       0xf400f800,
-       0x01b0f030,
-       0x0101b000,
-       0xb00201b0,
-       0x04980301,
-       0x3045c71a,
-       0xc70150b6,
-       0x60b63446,
-       0x3847c701,
-       0xf40170b6,
-       0x84bd0232,
-/* 0x01da: ncomp_loop */
-       0x4ac494bd,
-       0x0445b60f,
-/* 0x01e2: bpc_loop */
-       0xa430b4bd,
-       0x0f18f404,
-       0xbbc0a5ff,
-       0x31f400cb,
-       0x220ef402,
-/* 0x01f4: cmp_c0 */
-       0xf00c1bf4,
-       0xcbbb10c7,
-       0x160ef400,
-/* 0x0200: cmp_c1 */
-       0xf406a430,
-       0xc7f00c18,
-       0x00cbbb14,
-/* 0x020f: cmp_zero */
-       0xf1070ef4,
-/* 0x0213: bpc_next */
-       0x380080c7,
-       0x80b601c8,
-       0x01b0b601,
-       0xf404b5b8,
-       0x90b6c308,
-       0x0497b801,
-       0xfdb208f4,
-       0x06800065,
-       0x1d08980e,
-       0xf40068fd,
-       0x64bd0502,
-/* 0x023c: dst_xcnt */
-       0x800075fd,
-       0x78fd1907,
-       0x1057f100,
-       0x0654b608,
-       0xd00056d0,
-       0x50b74057,
-       0x06980800,
-       0x0162b619,
-       0x980864b6,
-       0x72b60e07,
-       0x0567fd01,
-       0xb70056d0,
-       0xb4010050,
-       0x56d00060,
-       0x0160b400,
-       0xb44056d0,
-       0x56d00260,
-       0x0360b480,
-       0xb7c056d0,
-       0x98040050,
-       0x56d01b06,
-       0x1c069800,
-       0xf44056d0,
-       0x00f81030,
-/* 0x029c: cmd_exec_set_surface_tiled */
-       0xc7075798,
-       0x78c76879,
-       0x0380b664,
-       0xb06077c7,
-       0x1bf40e76,
-       0x0477f009,
-/* 0x02b7: xtile64 */
-       0xf00f0ef4,
-       0x70b6027c,
-       0x0947fd11,
-/* 0x02c3: xtileok */
-       0x980677f0,
-       0x5b980c5a,
-       0x00abfd0e,
-       0xbb01b7f0,
-       0xb2b604b7,
-       0xc4abff01,
-       0x9805a7bb,
-       0xe7f00d5d,
-       0x04e8bb01,
-       0xff01e2b6,
-       0xd8bbb4de,
-       0x01e0b605,
-       0xbb0cef94,
-       0xfefd02eb,
-       0x026cf005,
-       0x020860b7,
-       0xd00864b6,
-       0xb7bb006f,
-       0x00cbbb04,
-       0x98085f98,
-       0xfbfd0e5b,
-       0x01b7f000,
-       0xb604b7bb,
-       0xfbbb01b2,
-       0x05f7bb00,
-       0x5f98f0f9,
-       0x01b7f009,
-       0xb604b8bb,
-       0xfbbb01b2,
-       0x05f8bb00,
-       0x78bbf0f9,
-       0x0282b600,
-       0xbb01b7f0,
-       0xb9bb04b8,
-       0x0b589804,
-       0xbb01e7f0,
-       0xe2b604e9,
-       0xf48eff01,
-       0xbb04f7bb,
-       0x79bb00cf,
-       0x0589bb00,
-       0x90fcf0fc,
-       0xbb00d9fd,
-       0x89fd00ad,
-       0x008ffd00,
-       0xbb00a8bb,
-       0x92b604a7,
-       0x0497bb01,
-       0x988069d0,
-       0x58980557,
-       0x00acbb04,
-       0xb6007abb,
-       0x84b60081,
-       0x058bfd10,
-       0x060062b7,
-       0xb70067d0,
-       0xd0040060,
-       0x00f80068,
-/* 0x03a8: cmd_exec_set_surface_linear */
-       0xb7026cf0,
-       0xb6020260,
-       0x57980864,
-       0x0067d005,
-       0x040060b7,
-       0xb6045798,
-       0x67d01074,
-       0x0060b700,
-       0x06579804,
-       0xf80067d0,
-/* 0x03d1: cmd_exec_wait */
-       0xf900f900,
-       0x0007f110,
-       0x0604b608,
-/* 0x03dc: loop */
-       0xf00001cf,
-       0x1bf40114,
-       0xfc10fcfa,
-/* 0x03eb: cmd_exec_query */
-       0xc800f800,
-       0x1bf40d34,
-       0xd121f570,
-       0x0c47f103,
-       0x0644b608,
-       0xb6020598,
-       0x45d00450,
-       0x4040d000,
-       0xd00c57f0,
-       0x40b78045,
-       0x05980400,
-       0x1054b601,
-       0xb70045d0,
-       0xf1050040,
-       0xf00b0057,
-       0x45d00153,
-       0x4057f100,
-       0x0154b640,
-       0x808053f1,
-       0xf14045d0,
-       0xf1111057,
-       0xd0131253,
-       0x57f18045,
-       0x53f11514,
-       0x45d01716,
-       0x0157f1c0,
-       0x0153f026,
-       0x080047f1,
-       0xd00644b6,
-/* 0x045e: query_counter */
-       0x21f50045,
-       0x47f103d1,
-       0x44b6080c,
-       0x02059806,
-       0xd00045d0,
-       0x57f04040,
-       0x8045d004,
-       0x040040b7,
-       0xb6010598,
-       0x45d01054,
-       0x0040b700,
-       0x0057f105,
-       0x0045d003,
-       0x111057f1,
-       0x131253f1,
-       0x984045d0,
-       0x40b70305,
-       0x45d00500,
-       0x0157f100,
-       0x0153f026,
-       0x080047f1,
-       0xd00644b6,
-       0x00f80045,
-/* 0x04b8: cmd_exec */
-       0x03d121f5,
-       0xf4003fc8,
-       0x21f50e0b,
-       0x47f101af,
-       0x0ef40200,
-/* 0x04cd: cmd_exec_no_format */
-       0x1067f11e,
-       0x0664b608,
-       0x800177f0,
-       0x07800e07,
-       0x1d079819,
-       0xd00067d0,
-       0x44bd4067,
-/* 0x04e8: cmd_exec_init_src_surface */
-       0xbd0232f4,
-       0x043fc854,
-       0xf50a0bf4,
-       0xf403a821,
-/* 0x04fa: src_tiled */
-       0x21f50a0e,
-       0x49f0029c,
-/* 0x0501: cmd_exec_init_dst_surface */
-       0x0231f407,
-       0xc82c57f0,
-       0x0bf4083f,
-       0xa821f50a,
-       0x0a0ef403,
-/* 0x0514: dst_tiled */
-       0x029c21f5,
-/* 0x051b: cmd_exec_kick */
-       0xf10849f0,
-       0xb6080057,
-       0x06980654,
-       0x4056d01e,
-       0xf14167f0,
-       0xfd440063,
-       0x54d00546,
-       0x0c3fc800,
-       0xf5070bf4,
-/* 0x053f: cmd_exec_done */
-       0xf803eb21,
-/* 0x0541: cmd_wrcache_flush */
-       0x0027f100,
-       0xf034bd22,
-       0x23d00133,
-       0x0000f800,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c
new file mode 100644 (file)
index 0000000..2d2e549
--- /dev/null
@@ -0,0 +1,166 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include <engine/ce.h>
+#include <engine/falcon.h>
+#include "fuc/gf100.fuc3.h"
+
+struct gf100_ce_priv {
+       struct nvkm_falcon base;
+};
+
+/*******************************************************************************
+ * Copy object classes
+ ******************************************************************************/
+
+static struct nvkm_oclass
+gf100_ce0_sclass[] = {
+       { 0x90b5, &nvkm_object_ofuncs },
+       {},
+};
+
+static struct nvkm_oclass
+gf100_ce1_sclass[] = {
+       { 0x90b8, &nvkm_object_ofuncs },
+       {},
+};
+
+/*******************************************************************************
+ * PCE context
+ ******************************************************************************/
+
+static struct nvkm_ofuncs
+gf100_ce_context_ofuncs = {
+       .ctor = _nvkm_falcon_context_ctor,
+       .dtor = _nvkm_falcon_context_dtor,
+       .init = _nvkm_falcon_context_init,
+       .fini = _nvkm_falcon_context_fini,
+       .rd32 = _nvkm_falcon_context_rd32,
+       .wr32 = _nvkm_falcon_context_wr32,
+};
+
+static struct nvkm_oclass
+gf100_ce0_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xc0),
+       .ofuncs = &gf100_ce_context_ofuncs,
+};
+
+static struct nvkm_oclass
+gf100_ce1_cclass = {
+       .handle = NV_ENGCTX(CE1, 0xc0),
+       .ofuncs = &gf100_ce_context_ofuncs,
+};
+
+/*******************************************************************************
+ * PCE engine/subdev functions
+ ******************************************************************************/
+
+static int
+gf100_ce_init(struct nvkm_object *object)
+{
+       struct gf100_ce_priv *priv = (void *)object;
+       int ret;
+
+       ret = nvkm_falcon_init(&priv->base);
+       if (ret)
+               return ret;
+
+       nv_wo32(priv, 0x084, nv_engidx(&priv->base.base) - NVDEV_ENGINE_CE0);
+       return 0;
+}
+
+static int
+gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gf100_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, true,
+                                "PCE0", "ce0", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000040;
+       nv_subdev(priv)->intr = gt215_ce_intr;
+       nv_engine(priv)->cclass = &gf100_ce0_cclass;
+       nv_engine(priv)->sclass = gf100_ce0_sclass;
+       nv_falcon(priv)->code.data = gf100_pce_code;
+       nv_falcon(priv)->code.size = sizeof(gf100_pce_code);
+       nv_falcon(priv)->data.data = gf100_pce_data;
+       nv_falcon(priv)->data.size = sizeof(gf100_pce_data);
+       return 0;
+}
+
+static int
+gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gf100_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_falcon_create(parent, engine, oclass, 0x105000, true,
+                                "PCE1", "ce1", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000080;
+       nv_subdev(priv)->intr = gt215_ce_intr;
+       nv_engine(priv)->cclass = &gf100_ce1_cclass;
+       nv_engine(priv)->sclass = gf100_ce1_sclass;
+       nv_falcon(priv)->code.data = gf100_pce_code;
+       nv_falcon(priv)->code.size = sizeof(gf100_pce_code);
+       nv_falcon(priv)->data.data = gf100_pce_data;
+       nv_falcon(priv)->data.size = sizeof(gf100_pce_data);
+       return 0;
+}
+
+struct nvkm_oclass
+gf100_ce0_oclass = {
+       .handle = NV_ENGINE(CE0, 0xc0),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gf100_ce0_ctor,
+               .dtor = _nvkm_falcon_dtor,
+               .init = gf100_ce_init,
+               .fini = _nvkm_falcon_fini,
+               .rd32 = _nvkm_falcon_rd32,
+               .wr32 = _nvkm_falcon_wr32,
+       },
+};
+
+struct nvkm_oclass
+gf100_ce1_oclass = {
+       .handle = NV_ENGINE(CE1, 0xc0),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gf100_ce1_ctor,
+               .dtor = _nvkm_falcon_dtor,
+               .init = gf100_ce_init,
+               .fini = _nvkm_falcon_fini,
+               .rd32 = _nvkm_falcon_rd32,
+               .wr32 = _nvkm_falcon_wr32,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c
new file mode 100644 (file)
index 0000000..a998932
--- /dev/null
@@ -0,0 +1,173 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include <engine/ce.h>
+
+#include <core/engctx.h>
+
+struct gk104_ce_priv {
+       struct nvkm_engine base;
+};
+
+/*******************************************************************************
+ * Copy object classes
+ ******************************************************************************/
+
+static struct nvkm_oclass
+gk104_ce_sclass[] = {
+       { 0xa0b5, &nvkm_object_ofuncs },
+       {},
+};
+
+/*******************************************************************************
+ * PCE context
+ ******************************************************************************/
+
+static struct nvkm_ofuncs
+gk104_ce_context_ofuncs = {
+       .ctor = _nvkm_engctx_ctor,
+       .dtor = _nvkm_engctx_dtor,
+       .init = _nvkm_engctx_init,
+       .fini = _nvkm_engctx_fini,
+       .rd32 = _nvkm_engctx_rd32,
+       .wr32 = _nvkm_engctx_wr32,
+};
+
+static struct nvkm_oclass
+gk104_ce_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xc0),
+       .ofuncs = &gk104_ce_context_ofuncs,
+};
+
+/*******************************************************************************
+ * PCE engine/subdev functions
+ ******************************************************************************/
+
+static void
+gk104_ce_intr(struct nvkm_subdev *subdev)
+{
+       const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
+       struct gk104_ce_priv *priv = (void *)subdev;
+       u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
+
+       if (stat) {
+               nv_warn(priv, "unhandled intr 0x%08x\n", stat);
+               nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
+       }
+}
+
+static int
+gk104_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gk104_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE0", "ce0", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000040;
+       nv_subdev(priv)->intr = gk104_ce_intr;
+       nv_engine(priv)->cclass = &gk104_ce_cclass;
+       nv_engine(priv)->sclass = gk104_ce_sclass;
+       return 0;
+}
+
+static int
+gk104_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gk104_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE1", "ce1", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00000080;
+       nv_subdev(priv)->intr = gk104_ce_intr;
+       nv_engine(priv)->cclass = &gk104_ce_cclass;
+       nv_engine(priv)->sclass = gk104_ce_sclass;
+       return 0;
+}
+
+static int
+gk104_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+              struct nvkm_oclass *oclass, void *data, u32 size,
+              struct nvkm_object **pobject)
+{
+       struct gk104_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCE2", "ce2", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00200000;
+       nv_subdev(priv)->intr = gk104_ce_intr;
+       nv_engine(priv)->cclass = &gk104_ce_cclass;
+       nv_engine(priv)->sclass = gk104_ce_sclass;
+       return 0;
+}
+
+struct nvkm_oclass
+gk104_ce0_oclass = {
+       .handle = NV_ENGINE(CE0, 0xe0),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gk104_ce0_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
+
+struct nvkm_oclass
+gk104_ce1_oclass = {
+       .handle = NV_ENGINE(CE1, 0xe0),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gk104_ce1_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
+
+struct nvkm_oclass
+gk104_ce2_oclass = {
+       .handle = NV_ENGINE(CE2, 0xe0),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gk104_ce2_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = _nvkm_engine_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
new file mode 100644 (file)
index 0000000..d8bb429
--- /dev/null
@@ -0,0 +1,152 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include <engine/ce.h>
+#include <engine/falcon.h>
+#include <engine/fifo.h>
+#include "fuc/gt215.fuc3.h"
+
+#include <core/client.h>
+#include <core/device.h>
+#include <core/enum.h>
+
+struct gt215_ce_priv {
+       struct nvkm_falcon base;
+};
+
+/*******************************************************************************
+ * Copy object classes
+ ******************************************************************************/
+
+static struct nvkm_oclass
+gt215_ce_sclass[] = {
+       { 0x85b5, &nvkm_object_ofuncs },
+       {}
+};
+
+/*******************************************************************************
+ * PCE context
+ ******************************************************************************/
+
+static struct nvkm_oclass
+gt215_ce_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xa3),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_falcon_context_ctor,
+               .dtor = _nvkm_falcon_context_dtor,
+               .init = _nvkm_falcon_context_init,
+               .fini = _nvkm_falcon_context_fini,
+               .rd32 = _nvkm_falcon_context_rd32,
+               .wr32 = _nvkm_falcon_context_wr32,
+
+       },
+};
+
+/*******************************************************************************
+ * PCE engine/subdev functions
+ ******************************************************************************/
+
+static const struct nvkm_enum
+gt215_ce_isr_error_name[] = {
+       { 0x0001, "ILLEGAL_MTHD" },
+       { 0x0002, "INVALID_ENUM" },
+       { 0x0003, "INVALID_BITFIELD" },
+       {}
+};
+
+void
+gt215_ce_intr(struct nvkm_subdev *subdev)
+{
+       struct nvkm_fifo *pfifo = nvkm_fifo(subdev);
+       struct nvkm_engine *engine = nv_engine(subdev);
+       struct nvkm_falcon *falcon = (void *)subdev;
+       struct nvkm_object *engctx;
+       u32 dispatch = nv_ro32(falcon, 0x01c);
+       u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);
+       u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff;
+       u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff;
+       u32 addr = nv_ro32(falcon, 0x040) >> 16;
+       u32 mthd = (addr & 0x07ff) << 2;
+       u32 subc = (addr & 0x3800) >> 11;
+       u32 data = nv_ro32(falcon, 0x044);
+       int chid;
+
+       engctx = nvkm_engctx_get(engine, inst);
+       chid   = pfifo->chid(pfifo, engctx);
+
+       if (stat & 0x00000040) {
+               nv_error(falcon, "DISPATCH_ERROR [");
+               nvkm_enum_print(gt215_ce_isr_error_name, ssta);
+               pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
+                      chid, inst << 12, nvkm_client_name(engctx), subc,
+                      mthd, data);
+               nv_wo32(falcon, 0x004, 0x00000040);
+               stat &= ~0x00000040;
+       }
+
+       if (stat) {
+               nv_error(falcon, "unhandled intr 0x%08x\n", stat);
+               nv_wo32(falcon, 0x004, stat);
+       }
+
+       nvkm_engctx_put(engctx);
+}
+
+static int
+gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+             struct nvkm_oclass *oclass, void *data, u32 size,
+             struct nvkm_object **pobject)
+{
+       bool enable = (nv_device(parent)->chipset != 0xaf);
+       struct gt215_ce_priv *priv;
+       int ret;
+
+       ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, enable,
+                                "PCE0", "ce0", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00802000;
+       nv_subdev(priv)->intr = gt215_ce_intr;
+       nv_engine(priv)->cclass = &gt215_ce_cclass;
+       nv_engine(priv)->sclass = gt215_ce_sclass;
+       nv_falcon(priv)->code.data = gt215_pce_code;
+       nv_falcon(priv)->code.size = sizeof(gt215_pce_code);
+       nv_falcon(priv)->data.data = gt215_pce_data;
+       nv_falcon(priv)->data.size = sizeof(gt215_pce_data);
+       return 0;
+}
+
+struct nvkm_oclass
+gt215_ce_oclass = {
+       .handle = NV_ENGINE(CE0, 0xa3),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gt215_ce_ctor,
+               .dtor = _nvkm_falcon_dtor,
+               .init = _nvkm_falcon_init,
+               .fini = _nvkm_falcon_fini,
+               .rd32 = _nvkm_falcon_rd32,
+               .wr32 = _nvkm_falcon_wr32,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c
deleted file mode 100644 (file)
index b14617a..0000000
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <engine/falcon.h>
-#include <engine/fifo.h>
-#include <engine/ce.h>
-
-#include <subdev/fb.h>
-#include <subdev/mmu.h>
-
-#include <core/client.h>
-#include <core/device.h>
-#include <core/enum.h>
-
-
-#include "fuc/nva3.fuc3.h"
-
-struct nva3_ce_priv {
-       struct nouveau_falcon base;
-};
-
-/*******************************************************************************
- * Copy object classes
- ******************************************************************************/
-
-static struct nouveau_oclass
-nva3_ce_sclass[] = {
-       { 0x85b5, &nouveau_object_ofuncs },
-       {}
-};
-
-/*******************************************************************************
- * PCE context
- ******************************************************************************/
-
-static struct nouveau_oclass
-nva3_ce_cclass = {
-       .handle = NV_ENGCTX(CE0, 0xa3),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = _nouveau_falcon_context_ctor,
-               .dtor = _nouveau_falcon_context_dtor,
-               .init = _nouveau_falcon_context_init,
-               .fini = _nouveau_falcon_context_fini,
-               .rd32 = _nouveau_falcon_context_rd32,
-               .wr32 = _nouveau_falcon_context_wr32,
-
-       },
-};
-
-/*******************************************************************************
- * PCE engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_enum nva3_ce_isr_error_name[] = {
-       { 0x0001, "ILLEGAL_MTHD" },
-       { 0x0002, "INVALID_ENUM" },
-       { 0x0003, "INVALID_BITFIELD" },
-       {}
-};
-
-void
-nva3_ce_intr(struct nouveau_subdev *subdev)
-{
-       struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
-       struct nouveau_engine *engine = nv_engine(subdev);
-       struct nouveau_falcon *falcon = (void *)subdev;
-       struct nouveau_object *engctx;
-       u32 dispatch = nv_ro32(falcon, 0x01c);
-       u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);
-       u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff;
-       u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff;
-       u32 addr = nv_ro32(falcon, 0x040) >> 16;
-       u32 mthd = (addr & 0x07ff) << 2;
-       u32 subc = (addr & 0x3800) >> 11;
-       u32 data = nv_ro32(falcon, 0x044);
-       int chid;
-
-       engctx = nouveau_engctx_get(engine, inst);
-       chid   = pfifo->chid(pfifo, engctx);
-
-       if (stat & 0x00000040) {
-               nv_error(falcon, "DISPATCH_ERROR [");
-               nouveau_enum_print(nva3_ce_isr_error_name, ssta);
-               pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
-                      chid, inst << 12, nouveau_client_name(engctx), subc,
-                      mthd, data);
-               nv_wo32(falcon, 0x004, 0x00000040);
-               stat &= ~0x00000040;
-       }
-
-       if (stat) {
-               nv_error(falcon, "unhandled intr 0x%08x\n", stat);
-               nv_wo32(falcon, 0x004, stat);
-       }
-
-       nouveau_engctx_put(engctx);
-}
-
-static int
-nva3_ce_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-              struct nouveau_oclass *oclass, void *data, u32 size,
-              struct nouveau_object **pobject)
-{
-       bool enable = (nv_device(parent)->chipset != 0xaf);
-       struct nva3_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, enable,
-                                   "PCE0", "ce0", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00802000;
-       nv_subdev(priv)->intr = nva3_ce_intr;
-       nv_engine(priv)->cclass = &nva3_ce_cclass;
-       nv_engine(priv)->sclass = nva3_ce_sclass;
-       nv_falcon(priv)->code.data = nva3_pce_code;
-       nv_falcon(priv)->code.size = sizeof(nva3_pce_code);
-       nv_falcon(priv)->data.data = nva3_pce_data;
-       nv_falcon(priv)->data.size = sizeof(nva3_pce_data);
-       return 0;
-}
-
-struct nouveau_oclass
-nva3_ce_oclass = {
-       .handle = NV_ENGINE(CE0, 0xa3),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nva3_ce_ctor,
-               .dtor = _nouveau_falcon_dtor,
-               .init = _nouveau_falcon_init,
-               .fini = _nouveau_falcon_fini,
-               .rd32 = _nouveau_falcon_rd32,
-               .wr32 = _nouveau_falcon_wr32,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c
deleted file mode 100644 (file)
index f5dff13..0000000
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <engine/falcon.h>
-#include <engine/fifo.h>
-#include <engine/ce.h>
-
-#include <core/enum.h>
-#include <core/enum.h>
-
-#include "fuc/nvc0.fuc3.h"
-
-struct nvc0_ce_priv {
-       struct nouveau_falcon base;
-};
-
-/*******************************************************************************
- * Copy object classes
- ******************************************************************************/
-
-static struct nouveau_oclass
-nvc0_ce0_sclass[] = {
-       { 0x90b5, &nouveau_object_ofuncs },
-       {},
-};
-
-static struct nouveau_oclass
-nvc0_ce1_sclass[] = {
-       { 0x90b8, &nouveau_object_ofuncs },
-       {},
-};
-
-/*******************************************************************************
- * PCE context
- ******************************************************************************/
-
-static struct nouveau_ofuncs
-nvc0_ce_context_ofuncs = {
-       .ctor = _nouveau_falcon_context_ctor,
-       .dtor = _nouveau_falcon_context_dtor,
-       .init = _nouveau_falcon_context_init,
-       .fini = _nouveau_falcon_context_fini,
-       .rd32 = _nouveau_falcon_context_rd32,
-       .wr32 = _nouveau_falcon_context_wr32,
-};
-
-static struct nouveau_oclass
-nvc0_ce0_cclass = {
-       .handle = NV_ENGCTX(CE0, 0xc0),
-       .ofuncs = &nvc0_ce_context_ofuncs,
-};
-
-static struct nouveau_oclass
-nvc0_ce1_cclass = {
-       .handle = NV_ENGCTX(CE1, 0xc0),
-       .ofuncs = &nvc0_ce_context_ofuncs,
-};
-
-/*******************************************************************************
- * PCE engine/subdev functions
- ******************************************************************************/
-
-static int
-nvc0_ce_init(struct nouveau_object *object)
-{
-       struct nvc0_ce_priv *priv = (void *)object;
-       int ret;
-
-       ret = nouveau_falcon_init(&priv->base);
-       if (ret)
-               return ret;
-
-       nv_wo32(priv, 0x084, nv_engidx(&priv->base.base) - NVDEV_ENGINE_CE0);
-       return 0;
-}
-
-static int
-nvc0_ce0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-               struct nouveau_oclass *oclass, void *data, u32 size,
-               struct nouveau_object **pobject)
-{
-       struct nvc0_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, true,
-                                   "PCE0", "ce0", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00000040;
-       nv_subdev(priv)->intr = nva3_ce_intr;
-       nv_engine(priv)->cclass = &nvc0_ce0_cclass;
-       nv_engine(priv)->sclass = nvc0_ce0_sclass;
-       nv_falcon(priv)->code.data = nvc0_pce_code;
-       nv_falcon(priv)->code.size = sizeof(nvc0_pce_code);
-       nv_falcon(priv)->data.data = nvc0_pce_data;
-       nv_falcon(priv)->data.size = sizeof(nvc0_pce_data);
-       return 0;
-}
-
-static int
-nvc0_ce1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-               struct nouveau_oclass *oclass, void *data, u32 size,
-               struct nouveau_object **pobject)
-{
-       struct nvc0_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_falcon_create(parent, engine, oclass, 0x105000, true,
-                                   "PCE1", "ce1", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00000080;
-       nv_subdev(priv)->intr = nva3_ce_intr;
-       nv_engine(priv)->cclass = &nvc0_ce1_cclass;
-       nv_engine(priv)->sclass = nvc0_ce1_sclass;
-       nv_falcon(priv)->code.data = nvc0_pce_code;
-       nv_falcon(priv)->code.size = sizeof(nvc0_pce_code);
-       nv_falcon(priv)->data.data = nvc0_pce_data;
-       nv_falcon(priv)->data.size = sizeof(nvc0_pce_data);
-       return 0;
-}
-
-struct nouveau_oclass
-nvc0_ce0_oclass = {
-       .handle = NV_ENGINE(CE0, 0xc0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nvc0_ce0_ctor,
-               .dtor = _nouveau_falcon_dtor,
-               .init = nvc0_ce_init,
-               .fini = _nouveau_falcon_fini,
-               .rd32 = _nouveau_falcon_rd32,
-               .wr32 = _nouveau_falcon_wr32,
-       },
-};
-
-struct nouveau_oclass
-nvc0_ce1_oclass = {
-       .handle = NV_ENGINE(CE1, 0xc0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nvc0_ce1_ctor,
-               .dtor = _nouveau_falcon_dtor,
-               .init = nvc0_ce_init,
-               .fini = _nouveau_falcon_fini,
-               .rd32 = _nouveau_falcon_rd32,
-               .wr32 = _nouveau_falcon_wr32,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c
deleted file mode 100644 (file)
index b2b31d1..0000000
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/os.h>
-#include <core/enum.h>
-#include <core/engctx.h>
-
-#include <engine/ce.h>
-
-struct nve0_ce_priv {
-       struct nouveau_engine base;
-};
-
-/*******************************************************************************
- * Copy object classes
- ******************************************************************************/
-
-static struct nouveau_oclass
-nve0_ce_sclass[] = {
-       { 0xa0b5, &nouveau_object_ofuncs },
-       {},
-};
-
-/*******************************************************************************
- * PCE context
- ******************************************************************************/
-
-static struct nouveau_ofuncs
-nve0_ce_context_ofuncs = {
-       .ctor = _nouveau_engctx_ctor,
-       .dtor = _nouveau_engctx_dtor,
-       .init = _nouveau_engctx_init,
-       .fini = _nouveau_engctx_fini,
-       .rd32 = _nouveau_engctx_rd32,
-       .wr32 = _nouveau_engctx_wr32,
-};
-
-static struct nouveau_oclass
-nve0_ce_cclass = {
-       .handle = NV_ENGCTX(CE0, 0xc0),
-       .ofuncs = &nve0_ce_context_ofuncs,
-};
-
-/*******************************************************************************
- * PCE engine/subdev functions
- ******************************************************************************/
-
-static void
-nve0_ce_intr(struct nouveau_subdev *subdev)
-{
-       const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
-       struct nve0_ce_priv *priv = (void *)subdev;
-       u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
-
-       if (stat) {
-               nv_warn(priv, "unhandled intr 0x%08x\n", stat);
-               nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
-       }
-}
-
-static int
-nve0_ce0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-               struct nouveau_oclass *oclass, void *data, u32 size,
-               struct nouveau_object **pobject)
-{
-       struct nve0_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE0", "ce0", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00000040;
-       nv_subdev(priv)->intr = nve0_ce_intr;
-       nv_engine(priv)->cclass = &nve0_ce_cclass;
-       nv_engine(priv)->sclass = nve0_ce_sclass;
-       return 0;
-}
-
-static int
-nve0_ce1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-               struct nouveau_oclass *oclass, void *data, u32 size,
-               struct nouveau_object **pobject)
-{
-       struct nve0_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE1", "ce1", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00000080;
-       nv_subdev(priv)->intr = nve0_ce_intr;
-       nv_engine(priv)->cclass = &nve0_ce_cclass;
-       nv_engine(priv)->sclass = nve0_ce_sclass;
-       return 0;
-}
-
-static int
-nve0_ce2_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-               struct nouveau_oclass *oclass, void *data, u32 size,
-               struct nouveau_object **pobject)
-{
-       struct nve0_ce_priv *priv;
-       int ret;
-
-       ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE2", "ce2", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00200000;
-       nv_subdev(priv)->intr = nve0_ce_intr;
-       nv_engine(priv)->cclass = &nve0_ce_cclass;
-       nv_engine(priv)->sclass = nve0_ce_sclass;
-       return 0;
-}
-
-struct nouveau_oclass
-nve0_ce0_oclass = {
-       .handle = NV_ENGINE(CE0, 0xe0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_ce0_ctor,
-               .dtor = _nouveau_engine_dtor,
-               .init = _nouveau_engine_init,
-               .fini = _nouveau_engine_fini,
-       },
-};
-
-struct nouveau_oclass
-nve0_ce1_oclass = {
-       .handle = NV_ENGINE(CE1, 0xe0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_ce1_ctor,
-               .dtor = _nouveau_engine_dtor,
-               .init = _nouveau_engine_init,
-               .fini = _nouveau_engine_fini,
-       },
-};
-
-struct nouveau_oclass
-nve0_ce2_oclass = {
-       .handle = NV_ENGINE(CE2, 0xe0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_ce2_ctor,
-               .dtor = _nouveau_engine_dtor,
-               .init = _nouveau_engine_init,
-               .fini = _nouveau_engine_fini,
-       },
-};
index 342305f8abd8cfc833bc65aed62c0f8dbc04c37c..dfc9e544e3e61990672ec35c6f85e7a7b2920df3 100644 (file)
@@ -88,11 +88,11 @@ gm100_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
 #if 0
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
index b74e27bb81f8c90d4dea407c95792213e80d0267..88353d33974f3b84a10857f3c5cd6639d5e0e169 100644 (file)
@@ -375,7 +375,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;
                break;
@@ -405,7 +405,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;
                break;
@@ -435,7 +435,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;
                break;
@@ -465,7 +465,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;
                break;
index a4859a541aea6ee0cd1e9a23e8a10e2fe7c0e36f..fd87b8f955edd96362a35d00e9af80d834bfb32e 100644 (file)
@@ -87,8 +87,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -120,8 +120,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -153,7 +153,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -185,8 +185,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -218,7 +218,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -250,7 +250,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -282,8 +282,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -315,7 +315,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
@@ -345,7 +345,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;
                break;
index 962a810d2b83ad81d28765c2ee83b18923ed486c..76cc21d383cb1cd9271f48a1ed764cc6a093e042 100644 (file)
@@ -85,9 +85,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -119,9 +119,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -153,9 +153,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -178,7 +178,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nve0_pm_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk20a_pmu_oclass;
@@ -209,9 +209,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -243,9 +243,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -277,9 +277,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
@@ -310,9 +310,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass;
                device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;
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