drm/amdgpu: update the core VI support for ELM/BAF

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ebcb0835d52a5166707ff08fd11c3634a0c200e9..52245c4c6d6521bfaa8a20b0cfd2cf7ec2fc8258 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1148,6 +1148,8 @@ static int amdgpu_early_init(struct amdgpu_device *adev)
        case CHIP_TOPAZ:
        case CHIP_TONGA:
        case CHIP_FIJI:
+       case CHIP_BAFFIN:
+       case CHIP_ELLESMERE:
        case CHIP_CARRIZO:
        case CHIP_STONEY:
                if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index ddbb63a88a74b251e5745069ac1eb10881d774ca..ae78bd41db7bef59f8b466d6edbaee5355256149 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -276,6 +276,8 @@ static void vi_init_golden_registers(struct amdgpu_device *adev)
                                                 stoney_mgcg_cgcg_init,
                                                 (const u32)ARRAY_SIZE(stoney_mgcg_cgcg_init));
                break;
+       case CHIP_BAFFIN:
+       case CHIP_ELLESMERE:
        default:
                break;
        }
@@ -537,6 +539,8 @@ static int vi_read_register(struct amdgpu_device *adev, u32 se_num,
                break;
        case CHIP_FIJI:
        case CHIP_TONGA:
+       case CHIP_BAFFIN:
+       case CHIP_ELLESMERE:
        case CHIP_CARRIZO:
        case CHIP_STONEY:
                asic_register_table = cz_allowed_read_registers;
@@ -907,6 +911,74 @@ static const struct amdgpu_ip_block_version fiji_ip_blocks[] =
        },
 };
 
+static const struct amdgpu_ip_block_version baffin_ip_blocks[] =
+{
+       /* ORDER MATTERS! */
+       {
+               .type = AMD_IP_BLOCK_TYPE_COMMON,
+               .major = 2,
+               .minor = 0,
+               .rev = 0,
+               .funcs = &vi_common_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_GMC,
+               .major = 8,
+               .minor = 1,
+               .rev = 0,
+               .funcs = &gmc_v8_0_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_IH,
+               .major = 3,
+               .minor = 1,
+               .rev = 0,
+               .funcs = &tonga_ih_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_SMC,
+               .major = 7,
+               .minor = 2,
+               .rev = 0,
+               .funcs = &amdgpu_pp_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_DCE,
+               .major = 11,
+               .minor = 2,
+               .rev = 0,
+               .funcs = &dce_v11_0_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_GFX,
+               .major = 8,
+               .minor = 0,
+               .rev = 0,
+               .funcs = &gfx_v8_0_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_SDMA,
+               .major = 3,
+               .minor = 1,
+               .rev = 0,
+               .funcs = &sdma_v3_0_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_UVD,
+               .major = 6,
+               .minor = 3,
+               .rev = 0,
+               .funcs = &uvd_v6_0_ip_funcs,
+       },
+       {
+               .type = AMD_IP_BLOCK_TYPE_VCE,
+               .major = 3,
+               .minor = 4,
+               .rev = 0,
+               .funcs = &vce_v3_0_ip_funcs,
+       },
+};
+
 static const struct amdgpu_ip_block_version cz_ip_blocks[] =
 {
        /* ORDER MATTERS! */
@@ -999,6 +1071,11 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                adev->ip_blocks = tonga_ip_blocks;
                adev->num_ip_blocks = ARRAY_SIZE(tonga_ip_blocks);
                break;
+       case CHIP_BAFFIN:
+       case CHIP_ELLESMERE:
+               adev->ip_blocks = baffin_ip_blocks;
+               adev->num_ip_blocks = ARRAY_SIZE(baffin_ip_blocks);
+               break;
        case CHIP_CARRIZO:
        case CHIP_STONEY:
                adev->ip_blocks = cz_ip_blocks;
@@ -1100,6 +1177,16 @@ static int vi_common_early_init(void *handle)
                adev->pg_flags = 0;
                adev->external_rev_id = adev->rev_id + 0x14;
                break;
+       case CHIP_BAFFIN:
+               adev->cg_flags = 0;
+               adev->pg_flags = 0;
+               adev->external_rev_id = adev->rev_id + 0x5A;
+               break;
+       case CHIP_ELLESMERE:
+               adev->cg_flags = 0;
+               adev->pg_flags = 0;
+               adev->external_rev_id = adev->rev_id + 0x50;
+               break;
        case CHIP_CARRIZO:
                adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
                        AMD_CG_SUPPORT_GFX_MGLS |