Disassemble 'add rX, rY, #0' as 'mov rX, rY'.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f0c2c4e8e7ec8101e038722e1c5665ff7521fb57..3c5b2bea891ec79f29bd966bae71b9fac85d50f5 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+Tue Jun  9 14:27:57 1998  Nick Clifton  <nickc@cygnus.com>
+
+       * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
+       'mov rX, rY'.  Patch courtesy of Tony Thompson <Tony.Thompson@arm.com>
+
 Mon Jun  8 18:17:21 1998  Nick Clifton  <nickc@cygnus.com>
 
        * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.

diff --git a/opcodes/arm-opc.h b/opcodes/arm-opc.h
index 43991377b64bee62e63e21aa36dc2f65770f738e..f49298fb0cd8c1d9a7baf89cdd36c98f014246b5 100644 (file)
--- a/opcodes/arm-opc.h
+++ b/opcodes/arm-opc.h
@@ -173,6 +173,7 @@ static struct thumb_opcode thumb_opcodes[] =
 {
   /* Thumb instructions */
   {0x46C0, 0xFFFF, "nop\t\t\t(mov r8,r8)"}, /* format 5 instructions do not update the PSR */
+  {0x1C00, 0xFFC0, "mov\t%0-2r, %3-5r\t\t(add %0-2r, %3-5r, #%6-8d)"},
   /* format 4 */
   {0x4000, 0xFFC0, "and\t%0-2r, %3-5r"},
   {0x4040, 0xFFC0, "eor\t%0-2r, %3-5r"},