MIPS: Don't use a 32-bit BFD architecture with a 64-bit ABI

Select `bfd_mach_mips4000', which corresponds to the MIPS III ISA, the
earlies with 64-bit support, whenever a 32-bit BFD architecture has been
chosen to use with a 64-bit ABI.  The situation can happen in a few
cases:

1. When the user has used `set architecture' or `set mips abi' commands
   to override automatic selection and then starts a debug session by
   requesting to run, attach or connect to a target.

2. In native debugging when reattaching to a previously debugged process
   where the program to be debugged has been since discarded, as
   observed with:

FAIL: gdb.base/attach.exp: attach2, with no file (GDB internal error)

   in n32 and n64 regression testing.

3. In remote debugging with a non-XML debug stub when discarding the
   program to be debugged while connected to the remote target, as
   observed with:

FAIL: gdb.base/break-unload-file.exp: cmdline: always-inserted on: break: file (GDB internal error)

   in n32 and n64 regression testing.

In the latter two cases the ABI, quite rightfully, is retained while the
program to be debugged is discarded.  This is because in that case the
ABI previously determined is carried over along with `gdbarch' in use,
which is retained.  The BFD architecture is however discarded and the
default then applies, because it is not attached to `gdbarch'.

In all these cases we trip with an internal error message as follows:

.../gdb/mips-tdep.c:766: internal-error: bad register size
A problem internal to GDB has been detected,
further debugging may prove unreliable.
Quit this debugging session? (y or n) n

This is a bug, please report it.  For instructions, see:
<http://www.gnu.org/software/gdb/bugs/>.

coming from `mips_pseudo_register_read', because the raw register width
inferred from the BFD architecture turns out to be 4 for the general
registers while the cooked register width inferred from the ABI in
effect is 8.

We do not hit this internal error in remote debugging with an XML debug
stub, because in that case raw register width information is passed by
the stub along with the XML target description.

Ultimately I think we ought to make the BFD architecture sticky like the
ABI, however in the interim this simple fix will do, removing the error
across all three cases.  The case where the user has used `set mips abi'
or `set architecture' commands has to be handled anyway, and although a
more sophisticated solution could be envisaged, such as reporting an
error with the respective `set' command, I think this is too much of a
corner case to bother.

	gdb/
	* mips-tdep.c (mips_gdbarch_init): Don't use a 32-bit BFD
	architecture with a 64-bit ABI.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index fd79872063e593461ea9920d12ab92edbc95dfcb..b9a9bcdbb4c1398ea062b33dd7c62da35edae54f 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2018-02-26  Maciej W. Rozycki  <macro@mips.com>
+
+       * mips-tdep.c (mips_gdbarch_init): Don't use a 32-bit BFD
+       architecture with a 64-bit ABI.
+
 2018-02-26  Maciej W. Rozycki  <macro@mips.com>
 
        * gdb/mips-tdep.c (mips_gdbarch_init): Reorder ABI determination

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index ae747ffd55703b3adb55216c87189025b00ea33c..f9f84c4d486e6880cf433e928b08a5b23c9af7dd 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -8185,6 +8185,14 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     fprintf_unfiltered (gdb_stdlog, "mips_gdbarch_init: mips_abi = %d\n",
                        mips_abi);
 
+  /* Make sure we don't use a 32-bit architecture with a 64-bit ABI.  */
+  if (mips_abi != MIPS_ABI_EABI32
+      && mips_abi != MIPS_ABI_O32
+      && info.bfd_arch_info != NULL
+      && info.bfd_arch_info->arch == bfd_arch_mips
+      && info.bfd_arch_info->bits_per_word < 64)
+    info.bfd_arch_info = bfd_lookup_arch (bfd_arch_mips, bfd_mach_mips4000);
+
   /* Determine the default compressed ISA.  */
   if ((elf_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0
       && (elf_flags & EF_MIPS_ARCH_ASE_M16) == 0)