ath9k: Allow platform override BTCoex pin
authorMiaoqing Pan <miaoqing@codeaurora.org>
Mon, 7 Mar 2016 02:38:18 +0000 (10:38 +0800)
committerKalle Valo <kvalo@qca.qualcomm.com>
Fri, 11 Mar 2016 12:00:03 +0000 (14:00 +0200)
Add new platform data to allow override BTCoex default pin.

Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath9k/btcoex.c
include/linux/ath9k_platform.h

index 4737aa947f99d19f80a5ae549066e9cb8eb51fc9..95a810ba98ac12fc7f26947ea26435526de756f1 100644 (file)
@@ -15,6 +15,8 @@
  */
 
 #include <linux/export.h>
+#include <linux/types.h>
+#include <linux/ath9k_platform.h>
 #include "hw.h"
 
 enum ath_bt_mode {
@@ -90,6 +92,29 @@ void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
 }
 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
 
+static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
+                                    u8 btactive_gpio, u8 btpriority_gpio)
+{
+       struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
+       struct ath9k_platform_data *pdata = ah->dev->platform_data;
+
+       if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
+           btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
+               return;
+
+       /* bt priority GPIO will be ignored by 2 wire scheme */
+       if (pdata && (pdata->bt_active_pin || pdata->bt_priority_pin ||
+                     pdata->wlan_active_pin)) {
+               btcoex_hw->btactive_gpio = pdata->bt_active_pin;
+               btcoex_hw->wlanactive_gpio = pdata->wlan_active_pin;
+               btcoex_hw->btpriority_gpio = pdata->bt_priority_pin;
+       } else {
+               btcoex_hw->btactive_gpio = btactive_gpio;
+               btcoex_hw->wlanactive_gpio = wlanactive_gpio;
+               btcoex_hw->btpriority_gpio = btpriority_gpio;
+       }
+}
+
 void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
 {
        struct ath_common *common = ath9k_hw_common(ah);
@@ -107,19 +132,19 @@ void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
                btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
        } else if (AR_SREV_9300_20_OR_LATER(ah)) {
                btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
-               btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
-               btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
-               btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
-       } else if (AR_SREV_9280_20_OR_LATER(ah)) {
-               btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
-               btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
 
-               if (AR_SREV_9285(ah)) {
+               ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
+                                        ATH_BTACTIVE_GPIO_9300,
+                                        ATH_BTPRIORITY_GPIO_9300);
+       } else if (AR_SREV_9280_20_OR_LATER(ah)) {
+               if (AR_SREV_9285(ah))
                        btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
-                       btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
-               } else {
+               else
                        btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
-               }
+
+               ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
+                                        ATH_BTACTIVE_GPIO_9280,
+                                        ATH_BTPRIORITY_GPIO_9285);
        }
 }
 EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
index 33eb274cd0e6b61be2b000e3e30c82f2ea6c7f1e..e66153d60bd50e8d502d58d44fac4099bb00c689 100644 (file)
@@ -31,6 +31,10 @@ struct ath9k_platform_data {
        u32 gpio_mask;
        u32 gpio_val;
 
+       u32 bt_active_pin;
+       u32 bt_priority_pin;
+       u32 wlan_active_pin;
+
        bool endian_check;
        bool is_clk_25mhz;
        bool tx_gain_buffalo;
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