mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly

Disable DLL delay line settings explicitly during driver initialization
in case ROM/uBoot had set an invalid delay.
e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021,
the uSDHC clock timing will become marginal when works on DDR mode
due to default delay and will possibly see CRC errors in case the board
is not perfectly designed on the eMMC chip layout.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 91c6a6864e15e626dc3f673a7ea79f6dfc45b7ef..874d5105f83c998bef6c36e88a6d172df2924954 100644 (file)
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
                */
                writel(readl(host->ioaddr + 0x6c) | BIT(7),
                        host->ioaddr + 0x6c);
+
+               /* disable DLL_CTRL delay line settings */
+               writel(0x0, host->ioaddr + ESDHC_DLL_CTRL);
        }
 
        if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)