usb: dwc2: host: clear pending interrupts prior hibernation
authorGregory Herrero <gregory.herrero@intel.com>
Tue, 22 Sep 2015 13:16:49 +0000 (15:16 +0200)
committerFelipe Balbi <balbi@ti.com>
Thu, 1 Oct 2015 17:40:17 +0000 (12:40 -0500)
If an interrupt rises during hibernation process, dwc2 will assert
interrupt line to interrupt controller. If interrupt is level
sensitive, interrupt handler will be called in a loop because dwc2
will not be able to clear it while controller is hibernated.
Thus, clear all controller interrupts before hibernation entry.

Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: John Youn <johnyoun@synopsys.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc2/core.c

index c5e0a45c565d660cb57c362c6471ac095877c9bf..bf5e951fbb7f8b400aa96e6bceb1792856119b3d 100644 (file)
@@ -398,6 +398,12 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
                }
        }
 
+       /*
+        * Clear any pending interrupts since dwc2 will not be able to
+        * clear them after entering hibernation.
+        */
+       dwc2_writel(0xffffffff, hsotg->regs + GINTSTS);
+
        /* Put the controller in low power state */
        pcgcctl = dwc2_readl(hsotg->regs + PCGCTL);
 
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