pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
authorBin Shi <Bin.Shi@csr.com>
Fri, 3 Jan 2014 02:59:24 +0000 (10:59 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 8 Jan 2014 09:50:21 +0000 (10:50 +0100)
sdmmc5 has only 3 pins CMD, CLK, DATA which are connected with CSR
TriG RF multi-GNSS. The hardware connection is like:
DATA -- GPS_SGN
CLK  -- GPS_RF_CLK
CMD  -- GPS_MAG
here we drop redundant pins in sdmmc5 group.

Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sirf/pinctrl-prima2.c

index 050777be0f1e2633c40849be02e93825b9455b9d..97046410e0cf298e14232fc40d40323beb094653 100644 (file)
@@ -467,12 +467,6 @@ static const struct sirfsoc_muxmask sdmmc5_muxmask[] = {
        {
                .group = 0,
                .mask = BIT(24) | BIT(25) | BIT(26),
-       }, {
-               .group = 1,
-               .mask = BIT(29),
-       }, {
-               .group = 2,
-               .mask = BIT(0) | BIT(1),
        },
 };
 
@@ -484,7 +478,7 @@ static const struct sirfsoc_padmux sdmmc5_padmux = {
        .funcval = BIT(13) | BIT(14),
 };
 
-static const unsigned sdmmc5_pins[] = { 24, 25, 26, 61, 64, 65 };
+static const unsigned sdmmc5_pins[] = { 24, 25, 26 };
 
 static const struct sirfsoc_muxmask usp0_muxmask[] = {
        {
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