drm/nouveau/cipher: namespace + nvidia gpu names (no binary change)
authorBen Skeggs <bskeggs@redhat.com>
Wed, 14 Jan 2015 05:22:43 +0000 (15:22 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 22 Jan 2015 02:18:00 +0000 (12:18 +1000)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/engine/cipher.h
drivers/gpu/drm/nouveau/nvkm/engine/cipher/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/cipher/nv84.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c

index 813bca367331bb86967252a6a5bc1d4d63d46b13..57c29e91bad56b8d6c120145ddca3f5c2e71976a 100644 (file)
@@ -1,4 +1,5 @@
 #ifndef __NVKM_CIPHER_H__
 #define __NVKM_CIPHER_H__
-extern struct nouveau_oclass nv84_cipher_oclass;
+#include <core/engine.h>
+extern struct nvkm_oclass g84_cipher_oclass;
 #endif
index 07cc2150463bf820d4f41a774d4e37ff9a61c6e2..fa39945327ce230496deff85f5b873905b0874f1 100644 (file)
@@ -1 +1 @@
-nvkm-y += nvkm/engine/cipher/nv84.o
+nvkm-y += nvkm/engine/cipher/g84.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c
new file mode 100644 (file)
index 0000000..13f3042
--- /dev/null
@@ -0,0 +1,184 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include <engine/cipher.h>
+#include <engine/fifo.h>
+
+#include <core/client.h>
+#include <core/engctx.h>
+#include <core/enum.h>
+
+struct g84_cipher_priv {
+       struct nvkm_engine base;
+};
+
+/*******************************************************************************
+ * Crypt object classes
+ ******************************************************************************/
+
+static int
+g84_cipher_object_ctor(struct nvkm_object *parent,
+                      struct nvkm_object *engine,
+                      struct nvkm_oclass *oclass, void *data, u32 size,
+                      struct nvkm_object **pobject)
+{
+       struct nvkm_gpuobj *obj;
+       int ret;
+
+       ret = nvkm_gpuobj_create(parent, engine, oclass, 0, parent,
+                                16, 16, 0, &obj);
+       *pobject = nv_object(obj);
+       if (ret)
+               return ret;
+
+       nv_wo32(obj, 0x00, nv_mclass(obj));
+       nv_wo32(obj, 0x04, 0x00000000);
+       nv_wo32(obj, 0x08, 0x00000000);
+       nv_wo32(obj, 0x0c, 0x00000000);
+       return 0;
+}
+
+static struct nvkm_ofuncs
+g84_cipher_ofuncs = {
+       .ctor = g84_cipher_object_ctor,
+       .dtor = _nvkm_gpuobj_dtor,
+       .init = _nvkm_gpuobj_init,
+       .fini = _nvkm_gpuobj_fini,
+       .rd32 = _nvkm_gpuobj_rd32,
+       .wr32 = _nvkm_gpuobj_wr32,
+};
+
+static struct nvkm_oclass
+g84_cipher_sclass[] = {
+       { 0x74c1, &g84_cipher_ofuncs },
+       {}
+};
+
+/*******************************************************************************
+ * PCIPHER context
+ ******************************************************************************/
+
+static struct nvkm_oclass
+g84_cipher_cclass = {
+       .handle = NV_ENGCTX(CIPHER, 0x84),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_engctx_ctor,
+               .dtor = _nvkm_engctx_dtor,
+               .init = _nvkm_engctx_init,
+               .fini = _nvkm_engctx_fini,
+               .rd32 = _nvkm_engctx_rd32,
+               .wr32 = _nvkm_engctx_wr32,
+       },
+};
+
+/*******************************************************************************
+ * PCIPHER engine/subdev functions
+ ******************************************************************************/
+
+static const struct nvkm_bitfield
+g84_cipher_intr_mask[] = {
+       { 0x00000001, "INVALID_STATE" },
+       { 0x00000002, "ILLEGAL_MTHD" },
+       { 0x00000004, "ILLEGAL_CLASS" },
+       { 0x00000080, "QUERY" },
+       { 0x00000100, "FAULT" },
+       {}
+};
+
+static void
+g84_cipher_intr(struct nvkm_subdev *subdev)
+{
+       struct nvkm_fifo *pfifo = nvkm_fifo(subdev);
+       struct nvkm_engine *engine = nv_engine(subdev);
+       struct nvkm_object *engctx;
+       struct g84_cipher_priv *priv = (void *)subdev;
+       u32 stat = nv_rd32(priv, 0x102130);
+       u32 mthd = nv_rd32(priv, 0x102190);
+       u32 data = nv_rd32(priv, 0x102194);
+       u32 inst = nv_rd32(priv, 0x102188) & 0x7fffffff;
+       int chid;
+
+       engctx = nvkm_engctx_get(engine, inst);
+       chid   = pfifo->chid(pfifo, engctx);
+
+       if (stat) {
+               nv_error(priv, "%s", "");
+               nvkm_bitfield_print(g84_cipher_intr_mask, stat);
+               pr_cont(" ch %d [0x%010llx %s] mthd 0x%04x data 0x%08x\n",
+                      chid, (u64)inst << 12, nvkm_client_name(engctx),
+                      mthd, data);
+       }
+
+       nv_wr32(priv, 0x102130, stat);
+       nv_wr32(priv, 0x10200c, 0x10);
+
+       nvkm_engctx_put(engctx);
+}
+
+static int
+g84_cipher_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+               struct nvkm_oclass *oclass, void *data, u32 size,
+               struct nvkm_object **pobject)
+{
+       struct g84_cipher_priv *priv;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true,
+                                "PCIPHER", "cipher", &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->unit = 0x00004000;
+       nv_subdev(priv)->intr = g84_cipher_intr;
+       nv_engine(priv)->cclass = &g84_cipher_cclass;
+       nv_engine(priv)->sclass = g84_cipher_sclass;
+       return 0;
+}
+
+static int
+g84_cipher_init(struct nvkm_object *object)
+{
+       struct g84_cipher_priv *priv = (void *)object;
+       int ret;
+
+       ret = nvkm_engine_init(&priv->base);
+       if (ret)
+               return ret;
+
+       nv_wr32(priv, 0x102130, 0xffffffff);
+       nv_wr32(priv, 0x102140, 0xffffffbf);
+       nv_wr32(priv, 0x10200c, 0x00000010);
+       return 0;
+}
+
+struct nvkm_oclass
+g84_cipher_oclass = {
+       .handle = NV_ENGINE(CIPHER, 0x84),
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = g84_cipher_ctor,
+               .dtor = _nvkm_engine_dtor,
+               .init = g84_cipher_init,
+               .fini = _nvkm_engine_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/cipher/nv84.c b/drivers/gpu/drm/nouveau/nvkm/engine/cipher/nv84.c
deleted file mode 100644 (file)
index d4ecd91..0000000
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/client.h>
-#include <core/os.h>
-#include <core/enum.h>
-#include <core/engctx.h>
-#include <core/gpuobj.h>
-
-#include <subdev/fb.h>
-
-#include <engine/fifo.h>
-#include <engine/cipher.h>
-
-struct nv84_cipher_priv {
-       struct nouveau_engine base;
-};
-
-/*******************************************************************************
- * Crypt object classes
- ******************************************************************************/
-
-static int
-nv84_cipher_object_ctor(struct nouveau_object *parent,
-                      struct nouveau_object *engine,
-                      struct nouveau_oclass *oclass, void *data, u32 size,
-                      struct nouveau_object **pobject)
-{
-       struct nouveau_gpuobj *obj;
-       int ret;
-
-       ret = nouveau_gpuobj_create(parent, engine, oclass, 0, parent,
-                                   16, 16, 0, &obj);
-       *pobject = nv_object(obj);
-       if (ret)
-               return ret;
-
-       nv_wo32(obj, 0x00, nv_mclass(obj));
-       nv_wo32(obj, 0x04, 0x00000000);
-       nv_wo32(obj, 0x08, 0x00000000);
-       nv_wo32(obj, 0x0c, 0x00000000);
-       return 0;
-}
-
-static struct nouveau_ofuncs
-nv84_cipher_ofuncs = {
-       .ctor = nv84_cipher_object_ctor,
-       .dtor = _nouveau_gpuobj_dtor,
-       .init = _nouveau_gpuobj_init,
-       .fini = _nouveau_gpuobj_fini,
-       .rd32 = _nouveau_gpuobj_rd32,
-       .wr32 = _nouveau_gpuobj_wr32,
-};
-
-static struct nouveau_oclass
-nv84_cipher_sclass[] = {
-       { 0x74c1, &nv84_cipher_ofuncs },
-       {}
-};
-
-/*******************************************************************************
- * PCIPHER context
- ******************************************************************************/
-
-static struct nouveau_oclass
-nv84_cipher_cclass = {
-       .handle = NV_ENGCTX(CIPHER, 0x84),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = _nouveau_engctx_ctor,
-               .dtor = _nouveau_engctx_dtor,
-               .init = _nouveau_engctx_init,
-               .fini = _nouveau_engctx_fini,
-               .rd32 = _nouveau_engctx_rd32,
-               .wr32 = _nouveau_engctx_wr32,
-       },
-};
-
-/*******************************************************************************
- * PCIPHER engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_bitfield nv84_cipher_intr_mask[] = {
-       { 0x00000001, "INVALID_STATE" },
-       { 0x00000002, "ILLEGAL_MTHD" },
-       { 0x00000004, "ILLEGAL_CLASS" },
-       { 0x00000080, "QUERY" },
-       { 0x00000100, "FAULT" },
-       {}
-};
-
-static void
-nv84_cipher_intr(struct nouveau_subdev *subdev)
-{
-       struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
-       struct nouveau_engine *engine = nv_engine(subdev);
-       struct nouveau_object *engctx;
-       struct nv84_cipher_priv *priv = (void *)subdev;
-       u32 stat = nv_rd32(priv, 0x102130);
-       u32 mthd = nv_rd32(priv, 0x102190);
-       u32 data = nv_rd32(priv, 0x102194);
-       u32 inst = nv_rd32(priv, 0x102188) & 0x7fffffff;
-       int chid;
-
-       engctx = nouveau_engctx_get(engine, inst);
-       chid   = pfifo->chid(pfifo, engctx);
-
-       if (stat) {
-               nv_error(priv, "%s", "");
-               nouveau_bitfield_print(nv84_cipher_intr_mask, stat);
-               pr_cont(" ch %d [0x%010llx %s] mthd 0x%04x data 0x%08x\n",
-                      chid, (u64)inst << 12, nouveau_client_name(engctx),
-                      mthd, data);
-       }
-
-       nv_wr32(priv, 0x102130, stat);
-       nv_wr32(priv, 0x10200c, 0x10);
-
-       nouveau_engctx_put(engctx);
-}
-
-static int
-nv84_cipher_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-              struct nouveau_oclass *oclass, void *data, u32 size,
-              struct nouveau_object **pobject)
-{
-       struct nv84_cipher_priv *priv;
-       int ret;
-
-       ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCIPHER", "cipher", &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_subdev(priv)->unit = 0x00004000;
-       nv_subdev(priv)->intr = nv84_cipher_intr;
-       nv_engine(priv)->cclass = &nv84_cipher_cclass;
-       nv_engine(priv)->sclass = nv84_cipher_sclass;
-       return 0;
-}
-
-static int
-nv84_cipher_init(struct nouveau_object *object)
-{
-       struct nv84_cipher_priv *priv = (void *)object;
-       int ret;
-
-       ret = nouveau_engine_init(&priv->base);
-       if (ret)
-               return ret;
-
-       nv_wr32(priv, 0x102130, 0xffffffff);
-       nv_wr32(priv, 0x102140, 0xffffffbf);
-       nv_wr32(priv, 0x10200c, 0x00000010);
-       return 0;
-}
-
-struct nouveau_oclass
-nv84_cipher_oclass = {
-       .handle = NV_ENGINE(CIPHER, 0x84),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv84_cipher_ctor,
-               .dtor = _nouveau_engine_dtor,
-               .init = nv84_cipher_init,
-               .fini = _nouveau_engine_fini,
-       },
-};
index 88353d33974f3b84a10857f3c5cd6639d5e0e169..72a90c74506cce33a706643a186f4c3f5f4b6a87 100644 (file)
@@ -111,7 +111,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
@@ -140,7 +140,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
@@ -169,7 +169,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
@@ -198,7 +198,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
@@ -227,7 +227,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
@@ -285,7 +285,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
-               device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
+               device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
                device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva0_disp_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;
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