No barrier needed on au1x.
authorPete Popov <ppopov@embeddedalley.com>
Mon, 28 Feb 2005 05:15:40 +0000 (05:15 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 29 Oct 2005 18:30:45 +0000 (19:30 +0100)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/pci/ops-au1000.c

index 74d91054db0969228e718cc8e2f7fa21d21063b1..be1420126c42329e24c01c011784457c4a796c15 100644 (file)
 
 int (*board_pci_idsel)(unsigned int devsel, int assert);
 
-/* CP0 hazard avoidance. */
-#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
-                                    "nop; nop; nop; nop;\t" \
-                                    ".set reorder\n\t")
-
 void mod_wired_entry(int entry, unsigned long entrylo0,
                unsigned long entrylo1, unsigned long entryhi,
                unsigned long pagemask)
@@ -66,16 +61,12 @@ void mod_wired_entry(int entry, unsigned long entrylo0,
        old_ctx = read_c0_entryhi() & 0xff;
        old_pagemask = read_c0_pagemask();
        write_c0_index(entry);
-       BARRIER;
        write_c0_pagemask(pagemask);
        write_c0_entryhi(entryhi);
        write_c0_entrylo0(entrylo0);
        write_c0_entrylo1(entrylo1);
-       BARRIER;
        tlb_write_indexed();
-       BARRIER;
        write_c0_entryhi(old_ctx);
-       BARRIER;
        write_c0_pagemask(old_pagemask);
 }
 
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