ARM: dts: berlin: add pmu node for BG2Q and BG2CD
authorJisheng Zhang <jszhang@marvell.com>
Fri, 26 Dec 2014 08:57:59 +0000 (16:57 +0800)
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Wed, 7 Jan 2015 14:25:13 +0000 (15:25 +0100)
This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
BG2CD SoCs.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
arch/arm/boot/dts/berlin2cd.dtsi
arch/arm/boot/dts/berlin2q.dtsi

index 230df3b1770e7d2f7476b9cc49d31a7071a784c7..a318bc32dc17bcea8644dd245d9ea3fd1bd236e5 100644 (file)
 
                ranges = <0 0xf7000000 0x1000000>;
 
+               pmu {
+                       compatible = "arm,cortex-a9-pmu";
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                sdhci0: sdhci@ab0000 {
                        compatible = "mrvl,pxav3-mmc";
                        reg = <0xab0000 0x200>;
index 35253c947a7cd0002211dac773d7f1f9723d6fce..933dcbbcfc5d8ab8fe8d86b10c3bf997298761bf 100644 (file)
                ranges = <0 0xf7000000 0x1000000>;
                interrupt-parent = <&gic>;
 
+               pmu {
+                       compatible = "arm,cortex-a9-pmu";
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                sdhci0: sdhci@ab0000 {
                        compatible = "mrvl,pxav3-mmc";
                        reg = <0xab0000 0x200>;
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