opcodes,gas: sparc: fix mnemonic of faligndatai

opcodes/ChangeLog:

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

gas/ChangeLog:

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
	* testsuite/gas/sparc/sparc5vis4.d: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bdbaa8d0d0865044f0224b9fdb256350c00ee766..edd2f2fcf55e10f959ee3405271477fedd7f39e0 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
+       * testsuite/gas/sparc/sparc5vis4.d: Likewise.
+
 2016-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/tc-arm.c (fpu_arch_vfp_v1): Mark with ATTRIBUTE_UNUSED.

diff --git a/gas/testsuite/gas/sparc/sparc5vis4.d b/gas/testsuite/gas/sparc/sparc5vis4.d
index 61a2de8fffa37f723e3913a9f5552c134b1a520a..bf5c90bbcf343e9b7176f95c6131a8212eef76e1 100644 (file)
--- a/gas/testsuite/gas/sparc/sparc5vis4.d
+++ b/gas/testsuite/gas/sparc/sparc5vis4.d
@@ -35,4 +35,4 @@ Disassembly of section .text:
   64:  95 b1 aa c8     fpsubs8  %f6, %f8, %f10
   68:  9d b2 aa ec     fpsubus8  %f10, %f12, %f14
   6c:  a5 b3 aa 70     fpsubus16  %f14, %f16, %f18
-  70:  bf b0 09 3f     faligndatai  %f0, %f62, %f4, %f62
+  70:  bf b0 09 3f     faligndata  %f0, %f62, %f4, %f62

diff --git a/gas/testsuite/gas/sparc/sparc5vis4.s b/gas/testsuite/gas/sparc/sparc5vis4.s
index 4bd7942e3a0e65a152b3d68d0e6cd2308d806991..0a0155f3376ab00fde91c6bf91b8e81ee53d38e3 100644 (file)
--- a/gas/testsuite/gas/sparc/sparc5vis4.s
+++ b/gas/testsuite/gas/sparc/sparc5vis4.s
@@ -28,4 +28,4 @@
        fpsubs8 %f6, %f8, %f10
        fpsubus8 %f10, %f12, %f14
        fpsubus16 %f14, %f16, %f18
-       faligndatai %f0, %f62, %f4, %f62
+       faligndata %f0, %f62, %f4, %f62

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0313e12eb5e6e634c68cd0331272c13cd6494fb5..3df576e4bb7ac4f39482e5e76f7a764d780b32ac 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
+
 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.

diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index e681a2ff6806095faba98a1e7f130d19b289a9a7..e40ce3742848f35beee1e5ea12e13b745bca689c 100644 (file)
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -1834,7 +1834,8 @@ SLCBCC("cbnefr", 15),
 
 { "alignaddr", F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", 0, HWCAP_VIS, 0, v9a },
 { "alignaddrl",        F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", 0, HWCAP_VIS, 0, v9a },
-{ "faligndata",        F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, HWCAP_VIS, 0, v9a },
+{ "faligndata",        F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, HWCAP_VIS, 0, v9a }, /* faligndatag */
+{ "faligndata", F3F(2, 0x36, 0x049), F3F(~2, ~0x36, ~0x049), "v,B,5,}", 0, 0, HWCAP2_SPARC5, v9b }, /* faligndatai  */
 
 { "fzerod",    F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", 0, HWCAP_VIS, 0, v9a },
 { "fzero",     F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", F_ALIAS, HWCAP_VIS, 0, v9a },
@@ -2058,13 +2059,11 @@ SLCBCC("cbnefr", 15),
 { "mwait", F3(2, 0x30, 0)|RD(28), F3(~2, ~0x30, ~0)|RD(~28)|RS1_G0|ASI(~0),  "2", 0, 0, HWCAP2_MWAIT, v9b }, /* mwait r */
 { "mwait", F3(2, 0x30, 1)|RD(28), F3(~2, ~0x30, ~1)|RD(~28)|RS1_G0, "i", 0, 0, HWCAP2_MWAIT, v9b }, /* mwait imm */
 
-/* SPARC5 and VIS4.0 instructions.  */
+/* Other SPARC5 and VIS4.0 instructions.  */
 
 { "subxc",      F3(2, 0x36, 0)|OPF(0x41), F3(~2, ~0x36, ~0)|OPF(~0x41), "1,2,d", 0, 0, HWCAP2_SPARC5, v9b },
 { "subxccc",    F3(2, 0x36, 0)|OPF(0x43), F3(~2, ~0x36, ~0)|OPF(~0x43), "1,2,d", 0, 0, HWCAP2_SPARC5, v9b },
 
-{ "faligndatai", F3F(2, 0x36, 0x049), F3F(~2, ~0x36, ~0x049), "v,B,5,}", 0, 0, HWCAP2_SPARC5, v9b },
-
 { "fpadd8",     F3F(2, 0x36, 0x124), F3F(~2, ~0x36, ~0x124), "v,B,H", 0, 0, HWCAP2_SPARC5, v9b },
 { "fpadds8",    F3F(2, 0x36, 0x126), F3F(~2, ~0x36, ~0x126), "v,B,H", 0, 0, HWCAP2_SPARC5, v9b },
 { "fpaddus8",   F3F(2, 0x36, 0x127), F3F(~2, ~0x36, ~0x127), "v,B,H", 0, 0, HWCAP2_SPARC5, v9b },