gas/testsuite/

2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
	* gas/i386/x86-64-sse-noavx.s: Likewise.

	* gas/i386/sse-noavx.d: Updated.
	* gas/i386/x86-64-sse-noavx.d: Likewise.

opcodes/

2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
	* i386-tbl.h: Regenerated.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0d8e43c5e122af25f2fda4f52f4f36d0394e5f9d..af845e28a27dcb0de9ccd8c433fd05a8161df06a 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
+       * gas/i386/x86-64-sse-noavx.s: Likewise.
+
+       * gas/i386/sse-noavx.d: Updated.
+       * gas/i386/x86-64-sse-noavx.d: Likewise.
+
 2008-05-09  Catherine Moore  <clm@codesourcery.com>
 
        * gas/mips/mips16-hilo-match.s: New test.

diff --git a/gas/testsuite/gas/i386/sse-noavx.d b/gas/testsuite/gas/i386/sse-noavx.d
index f37f28525b2fa694b1b4cfa499f20c58a91d9964..4d5b6e6c2076672e7361271aad93e7589cf1ca9d 100644 (file)
--- a/gas/testsuite/gas/i386/sse-noavx.d
+++ b/gas/testsuite/gas/i386/sse-noavx.d
@@ -15,7 +15,9 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    dd 08                   fisttpll \(%eax\)
 [      ]*[a-f0-9]+:    0f f7 c7                maskmovq %mm7,%mm0
 [      ]*[a-f0-9]+:    0f 01 c8                monitor %eax,%ecx,%edx
+[      ]*[a-f0-9]+:    f2 0f d6 c8             movdq2q %xmm0,%mm1
 [      ]*[a-f0-9]+:    0f e7 10                movntq %mm2,\(%eax\)
+[      ]*[a-f0-9]+:    f3 0f d6 c8             movq2dq %mm0,%xmm1
 [      ]*[a-f0-9]+:    0f 01 c9                mwait  %eax,%ecx
 [      ]*[a-f0-9]+:    0f 38 1c c1             pabsb  %mm1,%mm0
 [      ]*[a-f0-9]+:    0f 38 1e c1             pabsd  %mm1,%mm0

diff --git a/gas/testsuite/gas/i386/sse-noavx.s b/gas/testsuite/gas/i386/sse-noavx.s
index add51a08f5071d76873c7c51b34ded82057cfb83..53f5c92453cd3a93c23ed6d4b08c937dd506c99e 100644 (file)
--- a/gas/testsuite/gas/i386/sse-noavx.s
+++ b/gas/testsuite/gas/i386/sse-noavx.s
@@ -10,7 +10,9 @@ _start:
  fisttpll (%eax)
  maskmovq      %mm7,%mm0
  monitor
+ movdq2q       %xmm0, %mm1
  movntq                %mm2,(%eax)
+ movq2dq       %mm0, %xmm1
  mwait
  pabsb           %mm1,%mm0
  pabsd           %mm1,%mm0

diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.d b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
index c597a1d8c43357ee63bb7c88a29fa55bb26fc67f..3c842012c0a0d855fd2278bde15f3d31accd1d4a 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-sse-noavx.d
+++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
@@ -16,7 +16,9 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    dd 08                   fisttpll \(%rax\)
 [      ]*[a-f0-9]+:    0f f7 c7                maskmovq %mm7,%mm0
 [      ]*[a-f0-9]+:    0f 01 c8                monitor %rax,%rcx,%rdx
+[      ]*[a-f0-9]+:    f2 0f d6 c8             movdq2q %xmm0,%mm1
 [      ]*[a-f0-9]+:    0f e7 10                movntq %mm2,\(%rax\)
+[      ]*[a-f0-9]+:    f3 0f d6 c8             movq2dq %mm0,%xmm1
 [      ]*[a-f0-9]+:    0f 01 c9                mwait  %rax,%rcx
 [      ]*[a-f0-9]+:    0f 38 1c c1             pabsb  %mm1,%mm0
 [      ]*[a-f0-9]+:    0f 38 1e c1             pabsd  %mm1,%mm0

diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.s b/gas/testsuite/gas/i386/x86-64-sse-noavx.s
index 05ce292c9b6bccbd5d8be8be8ffcba968d3fe924..309c9283728acf3cdb5f3126e2e70a7bc29d248e 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-sse-noavx.s
+++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.s
@@ -11,7 +11,9 @@ _start:
  fisttpll (%rax)
  maskmovq      %mm7,%mm0
  monitor
+ movdq2q       %xmm0, %mm1
  movntq                %mm2,(%rax)
+ movq2dq       %mm0, %xmm1
  mwait
  pabsb           %mm1,%mm0
  pabsd           %mm1,%mm0

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 67204565064a398f7b47d59d56008b8211570f0d..e67b93b200479b5b5e056efed79bfa3be79f5195 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
+       * i386-tbl.h: Regenerated.
+
 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
        * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 35c0f90f0f4e216a240f0df71d29c04c8e0c7430..3b8e234788d0e22b2cd8ad2e0c151eae2a54e6c8 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1453,8 +1453,8 @@ movdqu, 2, 0xf36f, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|N
 movdqu, 2, 0xf37f, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM }
 movdqu, 2, 0xf30f6f, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
 movdqu, 2, 0xf30f7f, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM }
-movdq2q, 2, 0xf20fd6, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegMMX }
-movq2dq, 2, 0xf30fd6, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegMMX, RegXMM }
+movdq2q, 2, 0xf20fd6, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { RegXMM, RegMMX }
+movq2dq, 2, 0xf30fd6, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { RegMMX, RegXMM }
 pmuludq, 2, 0x66f4, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
 pmuludq, 2, 0x660ff4, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
 pmuludq, 2, 0xff4, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegMMX }

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 196cc76ab66b1636a4728747fb62ca1c6bb7f1bb..76a3e1a418f2d85ddb6ec5732826286013e402b5 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -13206,7 +13206,7 @@ const template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 
       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
     { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          0, 0, 0, 0, 0, 0 } },
@@ -13218,7 +13218,7 @@ const template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 
       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
     { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          0, 0, 0, 0, 0, 0 } },