serial: 8250: Do XR17V35X specific wakeup in serial8250_do_startup

The XR17V35X UART needs the ECB bit set in its XR_EFR
register to enable access to IER [7:5], ISR [5:4], FCR[5:4],
MCR[7:5], and MSR [7:0].

Also reset the IER register to mask interrupts after access
to all bits of this register has been enabled.

This makes my 8-port XR17V35X working with the in-kernel
serial driver.

Cc: Joe Schultz <jschultz@xes-inc.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Reviewed-by: Michael Welling <mwelling@ieee.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index de6655d50c37b2ce1041fbba70e0cb33cfb121d1..54e6c8ddef5d1361fa91170d1ac78918cf823303 100644 (file)
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1834,6 +1834,21 @@ int serial8250_do_startup(struct uart_port *port)
         */
        enable_rsa(up);
 #endif
+
+       if (port->type == PORT_XR17V35X) {
+               /*
+                * First enable access to IER [7:5], ISR [5:4], FCR [5:4],
+                * MCR [7:5] and MSR [7:0]
+                */
+               serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
+
+               /*
+                * Make sure all interrups are masked until initialization is
+                * complete and the FIFOs are cleared
+                */
+               serial_port_out(port, UART_IER, 0);
+       }
+
        /*
         * Clear the FIFO buffers and disable them.
         * (they will be reenabled in set_termios())