ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
authorSjoerd Simons <sjoerd.simons@collabora.co.uk>
Sat, 9 Jan 2016 12:54:18 +0000 (13:54 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 25 Jan 2016 08:16:59 +0000 (09:16 +0100)
Enable the sdio0 slot on the Rock2 square which has a broadcom wifi chip
attached and add a power sequence to enable the wifi chip and turn on
the required 32k clock.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3288-rock2-square.dts

index bcaf868a76bb00406b1a596e26d0c67231cc39f1..dd3ad2e93a6d538dcd29c5dbc17ca2feb8d82d5d 100644 (file)
                #sound-dai-cells = <0>;
        };
 
+       sdio_pwrseq: sdio-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&hym8563>;
+               clock-names = "ext_clock";
+               pinctrl-names = "default";
+               pinctrl-0 = <&wifi_enable>;
+               reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+       };
+
        vcc_usb_host: vcc-host-regulator {
                compatible = "regulator-fixed";
                enable-active-high;
        };
 };
 
+&sdio0 {
+       bus-width = <4>;
+       cap-sd-highspeed;
+       cap-sdio-irq;
+       disable-wp;
+       mmc-pwrseq = <&sdio_pwrseq>;
+       non-removable;
+       num-slots = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
+       vmmc-supply = <&vcc_io>;
+       vqmmc-supply = <&vcc_18>;
+       status = "okay";
+};
+
 &sdmmc {
        bus-width = <4>;
        cap-mmc-highspeed;
 };
 
 &i2c0 {
-       hym8563@51 {
+       hym8563: hym8563@51 {
                compatible = "haoyu,hym8563";
                reg = <0x51>;
                #clock-cells = <0>;
                        rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };
+
+       sdio {
+               wifi_enable: wifi-enable {
+                       rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
 };
 
 &spdif {
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