ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
authorKevin Hilman <khilman@ti.com>
Fri, 11 May 2012 23:00:24 +0000 (16:00 -0700)
committerKevin Hilman <khilman@ti.com>
Mon, 25 Jun 2012 18:22:48 +0000 (11:22 -0700)
Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional latency added to the idle path is signficiant.

In order allow the pre/post transitions to be isolated and called
per-pwrdm, change the API so passing in a specific power domain will
trigger the pre/post transtion accounting for only that specific power
domain.  Passing NULL means iterating over all power domains as is
current behavior.

Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
arch/arm/mach-omap2/omap-mpuss-lowpower.c
arch/arm/mach-omap2/pm34xx.c
arch/arm/mach-omap2/powerdomain.c
arch/arm/mach-omap2/powerdomain.h

index 13670aa84e58707ba0fdd284afbcee10a995b5e7..e35a86bf4e1dcdde5e5ffe850575cb60635ce5c3 100644 (file)
@@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
                return -ENXIO;
        }
 
-       pwrdm_pre_transition();
+       pwrdm_pre_transition(NULL);
 
        /*
         * Check MPUSS next state and save interrupt controller if needed.
@@ -287,7 +287,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
        wakeup_cpu = smp_processor_id();
        set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
 
-       pwrdm_post_transition();
+       pwrdm_post_transition(NULL);
 
        return 0;
 }
index e67d898433fbec4d572f17eddf7e25c7df4e626c..0bbbc8c82fd85c98a711b5997499709256a8eb9f 100644 (file)
@@ -273,7 +273,7 @@ void omap_sram_idle(void)
        per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
        core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
 
-       pwrdm_pre_transition();
+       pwrdm_pre_transition(NULL);
 
        /* PER */
        if (per_next_state < PWRDM_POWER_ON) {
@@ -338,7 +338,7 @@ void omap_sram_idle(void)
        }
        omap3_intc_resume_idle();
 
-       pwrdm_post_transition();
+       pwrdm_post_transition(NULL);
 
        /* PER */
        if (per_next_state < PWRDM_POWER_ON)
index 96114901b932a815296bb85632c3d2f69f526eb4..eefe179045e6897216d6b1a52b1b5b1ee00c755b 100644 (file)
@@ -981,15 +981,23 @@ int pwrdm_state_switch(struct powerdomain *pwrdm)
        return ret;
 }
 
-int pwrdm_pre_transition(void)
+int pwrdm_pre_transition(struct powerdomain *pwrdm)
 {
-       pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+       if (pwrdm)
+               _pwrdm_pre_transition_cb(pwrdm, NULL);
+       else
+               pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+
        return 0;
 }
 
-int pwrdm_post_transition(void)
+int pwrdm_post_transition(struct powerdomain *pwrdm)
 {
-       pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+       if (pwrdm)
+               _pwrdm_post_transition_cb(pwrdm, NULL);
+       else
+               pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+
        return 0;
 }
 
index 8f88d65c46ea5ab7a28c1fb70694a386556a5039..a6a4604801add75c2cfd8f2536e53a9beb32253d 100644 (file)
@@ -213,8 +213,8 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 
 int pwrdm_state_switch(struct powerdomain *pwrdm);
-int pwrdm_pre_transition(void);
-int pwrdm_post_transition(void);
+int pwrdm_pre_transition(struct powerdomain *pwrdm);
+int pwrdm_post_transition(struct powerdomain *pwrdm);
 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
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