ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi
authorPhilipp Zabel <p.zabel@pengutronix.de>
Wed, 5 Mar 2014 09:21:00 +0000 (10:21 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 7 Mar 2014 16:17:58 +0000 (16:17 +0000)
This patch connects IPU and display encoder (VGA, LVDS)
device tree nodes, as well as parallel displays on the DISP0
and DISP1 outputs, using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt

The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.

Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and encoders or panels have to be added.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/boot/dts/imx53-m53evk.dts
arch/arm/boot/dts/imx53-mba53.dts
arch/arm/boot/dts/imx53-qsb.dts
arch/arm/boot/dts/imx53.dtsi

index ee6107b6484c64798caea5b1fefcc7c4e46eb6b6..0298adc73bb700739c29bd34b1259ad12a0f1e31 100644 (file)
@@ -23,7 +23,6 @@
        soc {
                display1: display@di1 {
                        compatible = "fsl,imx-parallel-display";
-                       crtcs = <&ipu 1>;
                        interface-pix-fmt = "bgr666";
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_ipu_disp2_1>;
                                };
                        };
                };
+
+               port {
+                       display1_in: endpoint {
+                               remote-endpoint = <&ipu_di1_disp1>;
+                       };
+               };
        };
 
        backlight {
                default-brightness-level = <6>;
        };
 
-       imx-drm {
-               compatible = "fsl,imx-drm";
-               crtcs = <&ipu 1>;
-               connectors = <&display1>;
-       };
-
        leds {
                compatible = "gpio-leds";
                pinctrl-names = "default";
        };
 };
 
+&ipu_di1_disp1 {
+       remote-endpoint = <&display1_in>;
+};
+
 &nfc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_nand_1>;
index f2affb0cb959021a7a817bc342741213fc89d839..a5b55c6035918a2e7554104cc6ab07806588b8b3 100644 (file)
                compatible = "fsl,imx-parallel-display";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_disp1_1>;
-               crtcs = <&ipu 1>;
                interface-pix-fmt = "rgb24";
                status = "disabled";
-       };
 
-       imx-drm {
-               compatible = "fsl,imx-drm";
-               crtcs = <&ipu 1>;
-               connectors = <&disp1>, <&tve>;
+               port {
+                       display1_in: endpoint {
+                               remote-endpoint = <&ipu_di1_disp1>;
+                       };
+               };
        };
 
        reg_3p2v: 3p2v {
        };
 };
 
+&ipu_di1_disp1 {
+       remote-endpoint = <&display1_in>;
+};
+
 &cspi {
        status = "okay";
 };
index 3cb4f7791a9120c8ceb89afbe324904d3e0c49f2..8b254289344ff44ed189e3d148c3c995060990e5 100644 (file)
@@ -23,7 +23,6 @@
 
        display0: display@di0 {
                compatible = "fsl,imx-parallel-display";
-               crtcs = <&ipu 0>;
                interface-pix-fmt = "rgb565";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_ipu_disp0_1>;
                                pixelclk-active = <0>;
                        };
                };
+
+               port {
+                       display0_in: endpoint {
+                               remote-endpoint = <&ipu_di0_disp0>;
+                       };
+               };
        };
 
        gpio-keys {
                };
        };
 
-       imx-drm {
-               compatible = "fsl,imx-drm";
-               crtcs = <&ipu 0>;
-               connectors = <&display0>;
-       };
-
        leds {
                compatible = "gpio-leds";
                pinctrl-names = "default";
        status = "okay";
 };
 
+&ipu_di0_disp0 {
+       remote-endpoint = <&display0_in>;
+};
+
 &ssi2 {
        fsl,mode = "i2s-slave";
        status = "okay";
index 4307e80b2d2e386e53d48ee2080ca66df625565f..04d3127edfe1086f886b45c91e7f6927512825e8 100644 (file)
                };
        };
 
+       display-subsystem {
+               compatible = "fsl,imx-display-subsystem";
+               ports = <&ipu_di0>, <&ipu_di1>;
+       };
+
        tzic: tz-interrupt-controller@0fffc000 {
                compatible = "fsl,imx53-tzic", "fsl,tzic";
                interrupt-controller;
                ranges;
 
                ipu: ipu@18000000 {
-                       #crtc-cells = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        compatible = "fsl,imx53-ipu";
                        reg = <0x18000000 0x080000000>;
                        interrupts = <11 10>;
                        clocks = <&clks 59>, <&clks 110>, <&clks 61>;
                        clock-names = "bus", "di0", "di1";
                        resets = <&src 2>;
+
+                       ipu_di0: port@2 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <2>;
+
+                               ipu_di0_disp0: endpoint@0 {
+                                       reg = <0>;
+                               };
+
+                               ipu_di0_lvds0: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&lvds0_in>;
+                               };
+                       };
+
+                       ipu_di1: port@3 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <3>;
+
+                               ipu_di1_disp1: endpoint@0 {
+                                       reg = <0>;
+                               };
+
+                               ipu_di1_lvds1: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&lvds1_in>;
+                               };
+
+                               ipu_di1_tve: endpoint@2 {
+                                       reg = <2>;
+                                       remote-endpoint = <&tve_in>;
+                               };
+                       };
                };
 
                aips@50000000 { /* AIPS1 */
 
                                lvds-channel@0 {
                                        reg = <0>;
-                                       crtcs = <&ipu 0>;
                                        status = "disabled";
+
+                                       port {
+                                               lvds0_in: endpoint {
+                                                       remote-endpoint = <&ipu_di0_lvds0>;
+                                               };
+                                       };
                                };
 
                                lvds-channel@1 {
                                        reg = <1>;
-                                       crtcs = <&ipu 1>;
                                        status = "disabled";
+
+                                       port {
+                                               lvds1_in: endpoint {
+                                                       remote-endpoint = <&ipu_di0_lvds0>;
+                                               };
+                                       };
                                };
                        };
 
                                interrupts = <92>;
                                clocks = <&clks 69>, <&clks 116>;
                                clock-names = "tve", "di_sel";
-                               crtcs = <&ipu 1>;
                                status = "disabled";
+
+                               port {
+                                       tve_in: endpoint {
+                                               remote-endpoint = <&ipu_di1_tve>;
+                                       };
+                               };
                        };
 
                        vpu: vpu@63ff4000 {
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