ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5

This patch configures pin map in device tree of i2c0,
1,2,4 & 5 for ccu8540 board.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/ccu8540-pinctrl.dtsi b/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
index 644b189f8f7230d85987e6139919a677245b9ccd..e0799966bc25e7fc34c19f1d2631b74c49e49f44 100644 (file)
--- a/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
@@ -76,6 +76,121 @@
                                        };
                                };
                        };
+
+                       i2c0 {
+                               i2c0_default_mux: i2c_mux {
+                                       default_mux {
+                                               ste,function = "i2c0";
+                                               ste,pins = "i2c0_a_1";
+                                       };
+                               };
+
+                               i2c0_default_mode: i2c_default {
+                                       default_cfg1 {
+                                               ste,pins = "GPIO147", "GPIO148";
+                                               ste,config = <&in_pu>;
+                                       };
+                               };
+
+                               i2c0_sleep_mode: i2c_sleep {
+                                       sleep_cfg1 {
+                                               ste,pins = "GPIO147", "GPIO148";
+                                               ste,config = <&slpm_in_pu>;
+                                       };
+                               };
+                       };
+
+                       i2c1 {
+                               i2c1_default_mux: i2c_mux {
+                                       default_mux {
+                                               ste,function = "i2c1";
+                                               ste,pins = "i2c1_b_2";
+                                       };
+                               };
+
+                               i2c1_default_mode: i2c_default {
+                                       default_cfg1 {
+                                               ste,pins = "GPIO16", "GPIO17";
+                                               ste,config = <&in_pu>;
+                                       };
+                               };
+
+                               i2c1_sleep_mode: i2c_sleep {
+                                       sleep_cfg1 {
+                                               ste,pins = "GPIO16", "GPIO17";
+                                               ste,config = <&slpm_in_pu>;
+                                       };
+                               };
+                       };
+
+                       i2c2 {
+                               i2c2_default_mux: i2c_mux {
+                                       default_mux {
+                                               ste,function = "i2c2";
+                                               ste,pins = "i2c2_b_2";
+                                       };
+                               };
+
+                               i2c2_default_mode: i2c_default {
+                                       default_cfg1 {
+                                               ste,pins = "GPIO10", "GPIO11";
+                                               ste,config = <&in_pu>;
+                                       };
+                               };
+
+                               i2c2_sleep_mode: i2c_sleep {
+                                       sleep_cfg1 {
+                                               ste,pins = "GPIO11", "GPIO11";
+                                               ste,config = <&slpm_in_pu>;
+                                       };
+                               };
+                       };
+
+                       i2c4 {
+                               i2c4_default_mux: i2c_mux {
+                                       default_mux {
+                                               ste,function = "i2c4";
+                                               ste,pins = "i2c4_b_2";
+                                       };
+                               };
+
+                               i2c4_default_mode: i2c_default {
+                                       default_cfg1 {
+                                               ste,pins = "GPIO122", "GPIO123";
+                                               ste,config = <&in_pu>;
+                                       };
+                               };
+
+                               i2c4_sleep_mode: i2c_sleep {
+                                       sleep_cfg1 {
+                                               ste,pins = "GPIO122", "GPIO123";
+                                               ste,config = <&slpm_in_pu>;
+                                       };
+                               };
+                       };
+
+                       i2c5 {
+                               i2c5_default_mux: i2c_mux {
+                                       default_mux {
+                                               ste,function = "i2c5";
+                                               ste,pins = "i2c5_c_2";
+                                       };
+                               };
+
+                               i2c5_default_mode: i2c_default {
+                                       default_cfg1 {
+                                               ste,pins = "GPIO118", "GPIO119";
+                                               ste,config = <&in_pu>;
+                                       };
+                               };
+
+                               i2c5_sleep_mode: i2c_sleep {
+                                       sleep_cfg1 {
+                                               ste,pins = "GPIO118", "GPIO119";
+                                               ste,config = <&slpm_in_pu>;
+                                       };
+                               };
+                       };
                };
        };
 };

diff --git a/arch/arm/boot/dts/ccu8540.dts b/arch/arm/boot/dts/ccu8540.dts
index 3065fe4f60e5924a9ef0c5fa4299c17453963f04..7df65f0a33a5ea41c8de0b22f2ad30d91162722a 100644 (file)
--- a/arch/arm/boot/dts/ccu8540.dts
+++ b/arch/arm/boot/dts/ccu8540.dts
@@ -48,5 +48,39 @@
                        pinctrl-1 = <&uart2_sleep_mode>;
                        status = "okay";
                };
+
+               i2c0: i2c@80004000 {
+                       pinctrl-names = "default","sleep";
+                       pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
+                       pinctrl-1 = <&i2c0_sleep_mode>;
+               };
+
+               i2c1: i2c@80122000 {
+                       pinctrl-names = "default","sleep";
+                       pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
+                       pinctrl-1 = <&i2c1_sleep_mode>;
+               };
+
+               i2c2: i2c@80128000 {
+                       pinctrl-names = "default","sleep";
+                       pinctrl-0 = <&i2c2_default_mux>, <&i2c2_default_mode>;
+                       pinctrl-1 = <&i2c2_sleep_mode>;
+               };
+
+               i2c3: i2c@80110000 {
+                       status = "disabled";
+               };
+
+               i2c4: i2c@8012a000 {
+                       pinctrl-names = "default","sleep";
+                       pinctrl-0 = <&i2c4_default_mux>, <&i2c4_default_mode>;
+                       pinctrl-1 = <&i2c4_sleep_mode>;
+               };
+
+               i2c5: i2c@80001000 {
+                       pinctrl-names = "default","sleep";
+                       pinctrl-0 = <&i2c5_default_mux>, <&i2c5_default_mode>;
+                       pinctrl-1 = <&i2c5_sleep_mode>;
+               };
        };
 };