drm/i915: Expand error state's address width to 64b

v2: For semaphore errors, object is mapped to GGTT and offset will not
be > 4GB, print only lower 32-bits (Akash)
v3: Print gtt_offset in groups of 32-bit (Chris)

Cc: Akash Goel <akash.goel@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 79d2dcb13bb0803bc6a6eb3cf2d33a04204fbda4..91bd7786418100a77f4b6d6594aa7cf444083a46 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -547,7 +547,7 @@ struct drm_i915_error_state {
 
                struct drm_i915_error_object {
                        int page_count;
-                       u32 gtt_offset;
+                       u64 gtt_offset;
                        u32 *pages[0];
                } *ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
 
@@ -573,7 +573,7 @@ struct drm_i915_error_state {
                u32 size;
                u32 name;
                u32 rseqno[I915_NUM_RINGS], wseqno;
-               u32 gtt_offset;
+               u64 gtt_offset;
                u32 read_domains;
                u32 write_domain;
                s32 fence_reg:I915_MAX_NUM_FENCE_BITS;

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 41d0739e6fdfa9474a21b63b754c9000a7b33421..0d0a7b1a6b4b1342d193529f3a19c907138f2f81 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -197,8 +197,9 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
        err_printf(m, "  %s [%d]:\n", name, count);
 
        while (count--) {
-               err_printf(m, "    %08x %8u %02x %02x [ ",
-                          err->gtt_offset,
+               err_printf(m, "    %08x_%08x %8u %02x %02x [ ",
+                          upper_32_bits(err->gtt_offset),
+                          lower_32_bits(err->gtt_offset),
                           err->size,
                           err->read_domains,
                           err->write_domain);
@@ -427,15 +428,17 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
                                err_printf(m, " (submitted by %s [%d])",
                                           error->ring[i].comm,
                                           error->ring[i].pid);
-                       err_printf(m, " --- gtt_offset = 0x%08x\n",
-                                  obj->gtt_offset);
+                       err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
+                                  upper_32_bits(obj->gtt_offset),
+                                  lower_32_bits(obj->gtt_offset));
                        print_error_obj(m, obj);
                }
 
                obj = error->ring[i].wa_batchbuffer;
                if (obj) {
                        err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
-                                  dev_priv->ring[i].name, obj->gtt_offset);
+                                  dev_priv->ring[i].name,
+                                  lower_32_bits(obj->gtt_offset));
                        print_error_obj(m, obj);
                }
 
@@ -454,14 +457,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
                if ((obj = error->ring[i].ringbuffer)) {
                        err_printf(m, "%s --- ringbuffer = 0x%08x\n",
                                   dev_priv->ring[i].name,
-                                  obj->gtt_offset);
+                                  lower_32_bits(obj->gtt_offset));
                        print_error_obj(m, obj);
                }
 
                if ((obj = error->ring[i].hws_page)) {
                        err_printf(m, "%s --- HW Status = 0x%08x\n",
                                   dev_priv->ring[i].name,
-                                  obj->gtt_offset);
+                                  lower_32_bits(obj->gtt_offset));
                        offset = 0;
                        for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
                                err_printf(m, "[%04x] %08x %08x %08x %08x\n",
@@ -477,13 +480,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
                if ((obj = error->ring[i].ctx)) {
                        err_printf(m, "%s --- HW Context = 0x%08x\n",
                                   dev_priv->ring[i].name,
-                                  obj->gtt_offset);
+                                  lower_32_bits(obj->gtt_offset));
                        print_error_obj(m, obj);
                }
        }
 
        if ((obj = error->semaphore_obj)) {
-               err_printf(m, "Semaphore page = 0x%08x\n", obj->gtt_offset);
+               err_printf(m, "Semaphore page = 0x%08x\n",
+                          lower_32_bits(obj->gtt_offset));
                for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
                        err_printf(m, "[%04x] %08x %08x %08x %08x\n",
                                   elt * 4,
@@ -591,7 +595,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
        int num_pages;
        bool use_ggtt;
        int i = 0;
-       u32 reloc_offset;
+       u64 reloc_offset;
 
        if (src == NULL || src->pages == NULL)
                return NULL;