Properly sign-extend byte.

gas/testsuite/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.d: Updated.
	* gas/i386/opcode-intel.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

opcodes/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (sIbT): New.
	(b_T_mode): Likewise.
	(dis386): Replace sIb with sIbT on "pushT".
	(x86_64_table): Replace sIb with Ib on "aam" and "aad".
	(OP_sI): Handle b_T_mode.  Properly sign-extend byte.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2e3af6ed3f62fe3d0853e43b69b09af828afb0d3..26a1addbbc29a4dfa1e2b41fec3619e02eb45889 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/intel.d: Updated.
+       * gas/i386/opcode-intel.d: Likewise.
+       * gas/i386/opcode-suffix.d: Likewise.
+       * gas/i386/opcode.d: Likewise.
+
 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction

diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 8e7578c9df282d59db11d5aa50e221f1196034b3..45a66a5e41f589f3576c0d99512d7f774cdcafde 100644 (file)
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -212,8 +212,8 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    d1 90 90 90 90 90 [     ]*rcll   -0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    d2 90 90 90 90 90 [     ]*rclb   %cl,-0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    d3 90 90 90 90 90 [     ]*rcll   %cl,-0x6f6f6f70\(%eax\)
-[      ]*[a-f0-9]+:    d4 90 [         ]*aam    \$0xffffff90
-[      ]*[a-f0-9]+:    d5 90 [         ]*aad    \$0xffffff90
+[      ]*[a-f0-9]+:    d4 90 [         ]*aam    \$0x90
+[      ]*[a-f0-9]+:    d5 90 [         ]*aad    \$0x90
 [      ]*[a-f0-9]+:    d7 [    ]*xlat   %ds:\(%ebx\)
 [      ]*[a-f0-9]+:    d8 90 90 90 90 90 [     ]*fcoms  -0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    d9 90 90 90 90 90 [     ]*fsts   -0x6f6f6f70\(%eax\)
@@ -473,12 +473,12 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 62 90 90 90 90 90 [  ]*bound  %dx,-0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    66 68 90 90 [   ]*pushw  \$0x9090
 [      ]*[a-f0-9]+:    66 69 90 90 90 90 90 90 90 [    ]*imul   \$0x9090,-0x6f6f6f70\(%eax\),%dx
-[      ]*[a-f0-9]+:    66 6a 90 [      ]*pushw  \$0xffffff90
-[      ]*[a-f0-9]+:    66 6b 90 90 90 90 90 90 [       ]*imul   \$0xffffff90,-0x6f6f6f70\(%eax\),%dx
+[      ]*[a-f0-9]+:    66 6a 90 [      ]*pushw  \$0xff90
+[      ]*[a-f0-9]+:    66 6b 90 90 90 90 90 90 [       ]*imul   \$0xff90,-0x6f6f6f70\(%eax\),%dx
 [      ]*[a-f0-9]+:    66 6d [         ]*insw   \(%dx\),%es:\(%edi\)
 [      ]*[a-f0-9]+:    66 6f [         ]*outsw  %ds:\(%esi\),\(%dx\)
 [      ]*[a-f0-9]+:    66 81 90 90 90 90 90 90 90 [    ]*adcw   \$0x9090,-0x6f6f6f70\(%eax\)
-[      ]*[a-f0-9]+:    66 83 90 90 90 90 90 90 [       ]*adcw   \$0xffffff90,-0x6f6f6f70\(%eax\)
+[      ]*[a-f0-9]+:    66 83 90 90 90 90 90 90 [       ]*adcw   \$0xff90,-0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    66 85 90 90 90 90 90 [  ]*test   %dx,-0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    66 87 90 90 90 90 90 [  ]*xchg   %dx,-0x6f6f6f70\(%eax\)
 [      ]*[a-f0-9]+:    66 89 90 90 90 90 90 [  ]*mov    %dx,-0x6f6f6f70\(%eax\)

diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index 28a07b791043daf7dde34d1f581dec07ecc15fd5..23b7afad6df85de17eeed0bc371ff73af6675c18 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -210,8 +210,8 @@ Disassembly of section .text:
  *[0-9a-f]+:   d1 90 90 90 90 90[      ]+rcl[  ]+DWORD PTR \[eax-0x6f6f6f70\],1
  *[0-9a-f]+:   d2 90 90 90 90 90[      ]+rcl[  ]+BYTE PTR \[eax-0x6f6f6f70\],cl
  *[0-9a-f]+:   d3 90 90 90 90 90[      ]+rcl[  ]+DWORD PTR \[eax-0x6f6f6f70\],cl
- *[0-9a-f]+:   d4 90[  ]+aam[  ]+0xffffff90
- *[0-9a-f]+:   d5 90[  ]+aad[  ]+0xffffff90
+ *[0-9a-f]+:   d4 90[  ]+aam[  ]+0x90
+ *[0-9a-f]+:   d5 90[  ]+aad[  ]+0x90
  *[0-9a-f]+:   d7[     ]+xlat[         ]+(BYTE PTR )?(ds:)?\[ebx\]
  *[0-9a-f]+:   d8 90 90 90 90 90[      ]+fcom[         ]+DWORD PTR \[eax-0x6f6f6f70\]
  *[0-9a-f]+:   d9 90 90 90 90 90[      ]+fst[  ]+DWORD PTR \[eax-0x6f6f6f70\]
@@ -471,12 +471,12 @@ Disassembly of section .text:
  *[0-9a-f]+:   66 62 90 90 90 90 90[   ]+bound[        ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
  *[0-9a-f]+:   66 68 90 90[    ]+pushw[        ]+0x9090
  *[0-9a-f]+:   66 69 90 90 90 90 90 90 90[     ]+imul[         ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
- *[0-9a-f]+:   66 6a 90[       ]+pushw[        ]+0xffffff90
- *[0-9a-f]+:   66 6b 90 90 90 90 90 90[        ]+imul[         ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xffffff90
+ *[0-9a-f]+:   66 6a 90[       ]+pushw[        ]+0xff90
+ *[0-9a-f]+:   66 6b 90 90 90 90 90 90[        ]+imul[         ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xff90
  *[0-9a-f]+:   66 6d[  ]+ins[  ]+WORD PTR es:\[edi\],dx
  *[0-9a-f]+:   66 6f[  ]+outs[         ]+dx,WORD PTR ds:\[esi\]
  *[0-9a-f]+:   66 81 90 90 90 90 90 90 90[     ]+adc[  ]+WORD PTR \[eax-0x6f6f6f70\],0x9090
- *[0-9a-f]+:   66 83 90 90 90 90 90 90[        ]+adc[  ]+WORD PTR \[eax-0x6f6f6f70\],0xffffff90
+ *[0-9a-f]+:   66 83 90 90 90 90 90 90[        ]+adc[  ]+WORD PTR \[eax-0x6f6f6f70\],0xff90
  *[0-9a-f]+:   66 85 90 90 90 90 90[   ]+test[         ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
  *[0-9a-f]+:   66 87 90 90 90 90 90[   ]+xchg[         ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
  *[0-9a-f]+:   66 89 90 90 90 90 90[   ]+mov[  ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx

diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
index 97419446b81e7ed6e671dfcbadd2833c3857bb15..74e0adbbb194e6d8a22b3257dc4f8179335fa701 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -210,8 +210,8 @@ Disassembly of section .text:
  *[0-9a-f]+:   d1 90 90 90 90 90[      ]+rcll[         ]+-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   d2 90 90 90 90 90[      ]+rclb[         ]+%cl,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   d3 90 90 90 90 90[      ]+rcll[         ]+%cl,-0x6f6f6f70\(%eax\)
- *[0-9a-f]+:   d4 90[  ]+aam[  ]+\$0xffffff90
- *[0-9a-f]+:   d5 90[  ]+aad[  ]+\$0xffffff90
+ *[0-9a-f]+:   d4 90[  ]+aam[  ]+\$0x90
+ *[0-9a-f]+:   d5 90[  ]+aad[  ]+\$0x90
  *[0-9a-f]+:   d7[     ]+xlat[         ]+%ds:\(%ebx\)
  *[0-9a-f]+:   d8 90 90 90 90 90[      ]+fcoms[        ]+-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   d9 90 90 90 90 90[      ]+fsts[         ]+-0x6f6f6f70\(%eax\)
@@ -471,12 +471,12 @@ Disassembly of section .text:
  *[0-9a-f]+:   66 62 90 90 90 90 90[   ]+boundw %dx,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   66 68 90 90[    ]+pushw[        ]+\$0x9090
  *[0-9a-f]+:   66 69 90 90 90 90 90 90 90[     ]+imulw[        ]+\$0x9090,-0x6f6f6f70\(%eax\),%dx
- *[0-9a-f]+:   66 6a 90[       ]+pushw[        ]+\$0xffffff90
- *[0-9a-f]+:   66 6b 90 90 90 90 90 90[        ]+imulw[        ]+\$0xffffff90,-0x6f6f6f70\(%eax\),%dx
+ *[0-9a-f]+:   66 6a 90[       ]+pushw[        ]+\$0xff90
+ *[0-9a-f]+:   66 6b 90 90 90 90 90 90[        ]+imulw[        ]+\$0xff90,-0x6f6f6f70\(%eax\),%dx
  *[0-9a-f]+:   66 6d[  ]+insw[         ]+\(%dx\),%es:\(%edi\)
  *[0-9a-f]+:   66 6f[  ]+outsw[        ]+%ds:\(%esi\),\(%dx\)
  *[0-9a-f]+:   66 81 90 90 90 90 90 90 90[     ]+adcw[         ]+\$0x9090,-0x6f6f6f70\(%eax\)
- *[0-9a-f]+:   66 83 90 90 90 90 90 90[        ]+adcw[         ]+\$0xffffff90,-0x6f6f6f70\(%eax\)
+ *[0-9a-f]+:   66 83 90 90 90 90 90 90[        ]+adcw[         ]+\$0xff90,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   66 85 90 90 90 90 90[   ]+testw[        ]+%dx,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   66 87 90 90 90 90 90[   ]+xchgw[        ]+%dx,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+:   66 89 90 90 90 90 90[   ]+movw[         ]+%dx,-0x6f6f6f70\(%eax\)

diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
index 82366505c133a45fb5737880ddec4ce027f99449..1a94fc81f14d3e5887b8043bb2191f86eeca834a 100644 (file)
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -209,8 +209,8 @@ Disassembly of section .text:
  283:  d1 90 90 90 90 90 [     ]*rcll   -0x6f6f6f70\(%eax\)
  289:  d2 90 90 90 90 90 [     ]*rclb   %cl,-0x6f6f6f70\(%eax\)
  28f:  d3 90 90 90 90 90 [     ]*rcll   %cl,-0x6f6f6f70\(%eax\)
- 295:  d4 90 [         ]*aam    \$0xffffff90
- 297:  d5 90 [         ]*aad    \$0xffffff90
+ 295:  d4 90 [         ]*aam    \$0x90
+ 297:  d5 90 [         ]*aad    \$0x90
  299:  d7 [    ]*xlat   %ds:\(%ebx\)
  29a:  d8 90 90 90 90 90 [     ]*fcoms  -0x6f6f6f70\(%eax\)
  2a0:  d9 90 90 90 90 90 [     ]*fsts   -0x6f6f6f70\(%eax\)
@@ -470,12 +470,12 @@ Disassembly of section .text:
  783:  66 62 90 90 90 90 90 [  ]*bound  %dx,-0x6f6f6f70\(%eax\)
  78a:  66 68 90 90 [   ]*pushw  \$0x9090
  78e:  66 69 90 90 90 90 90 90 90 [    ]*imul   \$0x9090,-0x6f6f6f70\(%eax\),%dx
- 797:  66 6a 90 [      ]*pushw  \$0xffffff90
- 79a:  66 6b 90 90 90 90 90 90 [       ]*imul   \$0xffffff90,-0x6f6f6f70\(%eax\),%dx
+ 797:  66 6a 90 [      ]*pushw  \$0xff90
+ 79a:  66 6b 90 90 90 90 90 90 [       ]*imul   \$0xff90,-0x6f6f6f70\(%eax\),%dx
  7a2:  66 6d [         ]*insw   \(%dx\),%es:\(%edi\)
  7a4:  66 6f [         ]*outsw  %ds:\(%esi\),\(%dx\)
  7a6:  66 81 90 90 90 90 90 90 90 [    ]*adcw   \$0x9090,-0x6f6f6f70\(%eax\)
- 7af:  66 83 90 90 90 90 90 90 [       ]*adcw   \$0xffffff90,-0x6f6f6f70\(%eax\)
+ 7af:  66 83 90 90 90 90 90 90 [       ]*adcw   \$0xff90,-0x6f6f6f70\(%eax\)
  7b7:  66 85 90 90 90 90 90 [  ]*test   %dx,-0x6f6f6f70\(%eax\)
  7be:  66 87 90 90 90 90 90 [  ]*xchg   %dx,-0x6f6f6f70\(%eax\)
  7c5:  66 89 90 90 90 90 90 [  ]*mov    %dx,-0x6f6f6f70\(%eax\)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 80d3aaacea5df8980b113851efd3736121c61cfd..0b7b023422240df2fe895274167b4dfb36c99a86 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (sIbT): New.
+       (b_T_mode): Likewise.
+       (dis386): Replace sIb with sIbT on "pushT".
+       (x86_64_table): Replace sIb with Ib on "aam" and "aad".
+       (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
+
 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 
        * i386-init.h: Regenerated.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index a4e16cb6154836c97db8f6055019a66c18355c85..c9dd17a45fb309c0448e4612bae11ea13aeece90 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -252,6 +252,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Rm { OP_R, m_mode }
 #define Ib { OP_I, b_mode }
 #define sIb { OP_sI, b_mode }  /* sign extened byte */
+#define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */
 #define Iv { OP_I, v_mode }
 #define sIv { OP_sI, v_mode } 
 #define Iq { OP_I, q_mode }
@@ -414,6 +415,8 @@ enum
   b_mode = 1,
   /* byte operand with operand swapped */
   b_swap_mode,
+  /* byte operand, sign extend like 'T' suffix */
+  b_T_mode,
   /* operand size depends on prefixes */
   v_mode,
   /* operand size depends on prefixes with operand swapped */
@@ -1790,7 +1793,7 @@ static const struct dis386 dis386[] = {
   /* 68 */
   { "pushT",           { sIv } },
   { "imulS",           { Gv, Ev, Iv } },
-  { "pushT",           { sIb } },
+  { "pushT",           { sIbT } },
   { "imulS",           { Gv, Ev, sIb } },
   { "ins{b|}",         { Ybr, indirDX } },
   { X86_64_TABLE (X86_64_6D) },
@@ -5544,12 +5547,12 @@ static const struct dis386 x86_64_table[][2] = {
 
   /* X86_64_D4 */
   {
-    { "aam", { sIb } },
+    { "aam", { Ib } },
   },
 
   /* X86_64_D5 */
   {
-    { "aad", { sIb } },
+    { "aad", { Ib } },
   },
 
   /* X86_64_EA */
@@ -13731,10 +13734,32 @@ OP_sI (int bytemode, int sizeflag)
   switch (bytemode)
     {
     case b_mode:
+    case b_T_mode:
       FETCH_DATA (the_info, codep + 1);
       op = *codep++;
       if ((op & 0x80) != 0)
        op -= 0x100;
+      if (bytemode == b_T_mode)
+       {
+         if (address_mode != mode_64bit
+             || !(sizeflag & DFLAG))
+           {
+             if (sizeflag & DFLAG)
+               op &= 0xffffffff;
+             else
+               op &= 0xffff;
+         }
+       }
+      else
+       {
+         if (!(rex & REX_W))
+           {
+             if (sizeflag & DFLAG)
+               op &= 0xffffffff;
+             else
+               op &= 0xffff;
+           }
+       }
       break;
     case v_mode:
       if (sizeflag & DFLAG)