ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCI

Provide *_relaxed() accessors and make sure to pass the volatile void
__iomem * to accessors rather than the value cast to a u32. This allows
ixp4xx to build with IXP4XX_INDIRECT_PCI enabled.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fc4b7b24265e91d5c3007cc5d2ffe42229b85427..8537d4c41e34540a58d9230328b27278919012db 100644 (file)
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -652,7 +652,7 @@ static void __iomem *ixp4xx_ioremap_caller(phys_addr_t addr, size_t size,
        return (void __iomem *)addr;
 }
 
-static void ixp4xx_iounmap(void __iomem *addr)
+static void ixp4xx_iounmap(volatile void __iomem *addr)
 {
        if (!is_pci_memory((__force u32)addr))
                __iounmap(addr);

diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 559c69a477317b2b0e718ae64af18ebf5a67b5e5..0f737fcebcc1c8aa2a931a4c6689c81421d0cdbf 100644 (file)
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -58,6 +58,10 @@ static inline int is_pci_memory(u32 addr)
 #define writew(v, p)                   __indirect_writew(v, p)
 #define writel(v, p)                   __indirect_writel(v, p)
 
+#define writeb_relaxed(v, p)           __indirect_writeb(v, p)
+#define writew_relaxed(v, p)           __indirect_writew(v, p)
+#define writel_relaxed(v, p)           __indirect_writel(v, p)
+
 #define writesb(p, v, l)               __indirect_writesb(p, v, l)
 #define writesw(p, v, l)               __indirect_writesw(p, v, l)
 #define writesl(p, v, l)               __indirect_writesl(p, v, l)
@@ -66,6 +70,10 @@ static inline int is_pci_memory(u32 addr)
 #define readw(p)                       __indirect_readw(p)
 #define readl(p)                       __indirect_readl(p)
 
+#define readb_relaxed(p)               __indirect_readb(p)
+#define readw_relaxed(p)               __indirect_readw(p)
+#define readl_relaxed(p)               __indirect_readl(p)
+
 #define readsb(p, v, l)                        __indirect_readsb(p, v, l)
 #define readsw(p, v, l)                        __indirect_readsw(p, v, l)
 #define readsl(p, v, l)                        __indirect_readsl(p, v, l)
@@ -76,7 +84,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
        u32 n, byte_enables, data;
 
        if (!is_pci_memory(addr)) {
-               __raw_writeb(value, addr);
+               __raw_writeb(value, p);
                return;
        }
 
@@ -99,7 +107,7 @@ static inline void __indirect_writew(u16 value, volatile void __iomem *p)
        u32 n, byte_enables, data;
 
        if (!is_pci_memory(addr)) {
-               __raw_writew(value, addr);
+               __raw_writew(value, p);
                return;
        }
 
@@ -141,7 +149,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
        u32 n, byte_enables, data;
 
        if (!is_pci_memory(addr))
-               return __raw_readb(addr);
+               return __raw_readb(p);
 
        n = addr % 4;
        byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
@@ -164,7 +172,7 @@ static inline unsigned short __indirect_readw(const volatile void __iomem *p)
        u32 n, byte_enables, data;
 
        if (!is_pci_memory(addr))
-               return __raw_readw(addr);
+               return __raw_readw(p);
 
        n = addr % 4;
        byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;