ARM: dts: Add PPMU dt node for exynos3250
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 3 Feb 2015 23:10:58 +0000 (08:10 +0900)
committerKukjin Kim <kgene@kernel.org>
Tue, 3 Feb 2015 23:10:58 +0000 (08:10 +0900)
This patch adds PPMU (Platform Performance Monitoring Unit) dt node
to estimate the utilization of each IP in Exynos SoC through DEVFREQ
Event subsystem.

This patch adds following PPMU dt nodes:
- PPMU_DMC0     0x106a0000
- PPMU_DMC1     0x106b0000
- PPMU_RIGHTBUS 0x112A0000
- PPMU_LEFTBUS  0x116A0000
- PPMU_CAMIF    0x11AC0000
- PPMU_LCD0     0x11E40000
- PPMU_FSYS     0x12630000
- PPMU_3D       0x13220000
- PPMU_MFC      0x13660000
- PPMU_CPU      0x106c0000

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
arch/arm/boot/dts/exynos3250.dtsi

index acdf3440101593fcf173ec05552cf6bad10ac82c..277b48b0b6f9cd155737550d0586e9d720cf75f4 100644 (file)
                        compatible = "arm,cortex-a7-pmu";
                        interrupts = <0 18 0>, <0 19 0>;
                };
+
+               ppmu_dmc0: ppmu_dmc0@106a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106a0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_dmc1: ppmu_dmc1@106b0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106b0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_cpu: ppmu_cpu@106c0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106c0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_rightbus: ppmu_rightbus@112a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x112a0000 0x2000>;
+                       clocks = <&cmu CLK_PPMURIGHT>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_leftbus: ppmu_leftbus0@116a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x116a0000 0x2000>;
+                       clocks = <&cmu CLK_PPMULEFT>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_camif: ppmu_camif@11ac0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x11ac0000 0x2000>;
+                       clocks = <&cmu CLK_PPMUCAMIF>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_lcd0: ppmu_lcd0@11e40000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x11e40000 0x2000>;
+                       clocks = <&cmu CLK_PPMULCD0>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_fsys: ppmu_fsys@12630000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x12630000 0x2000>;
+                       clocks = <&cmu CLK_PPMUFILE>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_g3d: ppmu_g3d@13220000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x13220000 0x2000>;
+                       clocks = <&cmu CLK_PPMUG3D>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_mfc: ppmu_mfc@13660000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x13660000 0x2000>;
+                       clocks = <&cmu CLK_PPMUMFC_L>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
        };
 };
 
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