sparc: support %dN and %qN syntax for FP registers.

The SPARC Refence Manual documents the %dN and %qN syntax to
refer to double and quad-precision floating-point registers,
respectively.  See OSA2015 Appendix C, Assembly Language Syntax,
C1.1 Register Names.

This patch adds support for these names to GAS.  This eases the
porting of software from Solaris to GNU/Linux, as these register
names have been supported by the Solaris linker for a long time
and many assembler require that support.

gas/ChangeLog:

2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
	double and quad-precision floating-point registers.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c08c8b32f237636016f3fbd1575163808a143b99..147925e74884356d9a557bf576a0366e835bb04f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
+       double and quad-precision floating-point registers.
+
 2015-12-09  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-rx.c (rx_relax_frag): Fix compile time warning.

diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index 28e6ec8f6533a8a5016d7a8f19e6dab603731bc7..4cd2250b692b94f560f4154fccec62f10b899f69 100644 (file)
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -2370,7 +2370,9 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
                char format;
 
                if (*s++ == '%'
-                   && ((format = *s) == 'f')
+                   && ((format = *s) == 'f'
+                        || format == 'd'
+                        || format == 'q')
                    && ISDIGIT (*++s))
                  {
                    for (mask = 0; ISDIGIT (*s); ++s)
@@ -2381,19 +2383,23 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
                    if ((*args == 'v'
                         || *args == 'B'
                         || *args == '5'
-                        || *args == 'H')
+                        || *args == 'H'
+                        || format == 'd')
                        && (mask & 1))
                      {
+                        /* register must be even numbered */
                        break;
-                     }         /* register must be even numbered */
+                     }
 
                    if ((*args == 'V'
                         || *args == 'R'
-                        || *args == 'J')
+                        || *args == 'J'
+                        || format == 'q')
                        && (mask & 3))
                      {
+                        /* register must be multiple of 4 */
                        break;
-                     }         /* register must be multiple of 4 */
+                     }
 
                    if (mask >= 64)
                      {