ARM: shmobile: r8a7790: add MLB+ clock
authorAndrey Gusakov <andrey.gusakov@cogentembedded.com>
Thu, 18 Dec 2014 20:41:52 +0000 (23:41 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 23 Dec 2014 00:18:16 +0000 (09:18 +0900)
Add MLB+ clock to R8A7790 device tree.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7790.dtsi
include/dt-bindings/clock/r8a7790-clock.h

index ffeff98fa16e1c62aa7377828870b5938f3ade42..af30c2470f85501465aa0ca2875dcd63662c04cd 100644 (file)
                mstp8_clks: mstp8_clks@e6150990 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
-                       clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>,
-                                <&zs_clk>, <&zs_clk>;
+                       clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
+                                <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
-                               R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1
-                               R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1
-                               R8A7790_CLK_SATA0
+                               R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
+                               R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER
+                               R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
                        >;
                        clock-output-names =
-                               "vin3", "vin2", "vin1", "vin0", "ether", "sata1", "sata0";
+                               "mlb", "vin3", "vin2", "vin1", "vin0", "ether",
+                               "sata1", "sata0";
                };
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
index c27b3b5133b9442ea11bbe4d19e39769fad7956b..91940271cf8347265849da044ba26a62228e5bd2 100644 (file)
@@ -97,6 +97,7 @@
 #define R8A7790_CLK_LVDS0              26
 
 /* MSTP8 */
+#define R8A7790_CLK_MLB                        2
 #define R8A7790_CLK_VIN3               8
 #define R8A7790_CLK_VIN2               9
 #define R8A7790_CLK_VIN1               10
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