drm/i915: re-init modeset hw state after gpu reset

After a gpu reset we need to re-init some of the hw state we only
initialize when modeset is enabled, like rc6, hw contexts or render/GT
core clock gating and workaround register settings.

Note that this patch has a small change in the resume code:
- rc6 on gen6+ is only restored for the modeset case (for more
  consistency with other callsites). This is no problem because recent
  kernels refuse to load drm/i915 without kms on gen6+
- rc6/emon on ilk is only restored for the modeset case. This is no
  problem because rc6 is disabled by default on ilk, and ums on ilk
  has never really been a supported option outside of horrible rhel
  backports.

v2: Chris Wilson noticed that we not only fail to restore the clock
gating settings after gpu reset.

v3: Move the call to modeset_init_hw in _reset out of the
struct_mutext protected area - other callers don't hold it, too.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 96f8efc7a0d008e9fc7487e6b7165d05c0b19bbc..ccfdc813171db04148c6f0675b0fc79f98bdb7d8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -851,9 +851,14 @@ int i915_reset(struct drm_device *dev, u8 flags)
                i915_gem_init_ppgtt(dev);
 
                mutex_unlock(&dev->struct_mutex);
+
+               if (drm_core_check_feature(dev, DRIVER_MODESET))
+                       intel_modeset_init_hw(dev);
+
                drm_irq_uninstall(dev);
                drm_mode_config_reset(dev);
                drm_irq_install(dev);
+
                mutex_lock(&dev->struct_mutex);
        }
 

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a189f756036f70a14eba4eb824354a1b39e98d62..422f424deb4cef2b96ac21148ee2a18a0c2ddb97 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1433,6 +1433,7 @@ static inline void intel_unregister_dsm_handler(void) { return; }
 #endif /* CONFIG_ACPI */
 
 /* modesetting */
+extern void intel_modeset_init_hw(struct drm_device *dev);
 extern void intel_modeset_init(struct drm_device *dev);
 extern void intel_modeset_gem_init(struct drm_device *dev);
 extern void intel_modeset_cleanup(struct drm_device *dev);

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 2b5eb229ff2cc1c443d7f01039a4cc308201d211..0c3e3bf67c28b47741779d07bf2139b0d0971164 100644 (file)
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -879,17 +879,7 @@ int i915_restore_state(struct drm_device *dev)
        mutex_unlock(&dev->struct_mutex);
 
        if (drm_core_check_feature(dev, DRIVER_MODESET))
-               intel_init_clock_gating(dev);
-
-       if (IS_IRONLAKE_M(dev)) {
-               ironlake_enable_drps(dev);
-               intel_init_emon(dev);
-       }
-
-       if (INTEL_INFO(dev)->gen >= 6) {
-               gen6_enable_rps(dev_priv);
-               gen6_update_ring_freq(dev_priv);
-       }
+               intel_modeset_init_hw(dev);
 
        mutex_lock(&dev->struct_mutex);
 

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 743ec6b98476fbb510345169e81dde1ad55cc5f3..aee389c442a4e7433a96254389a8f57a9dd1c5f8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9530,6 +9530,23 @@ static void i915_disable_vga(struct drm_device *dev)
        POSTING_READ(vga_reg);
 }
 
+void intel_modeset_init_hw(struct drm_device *dev)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+
+       intel_init_clock_gating(dev);
+
+       if (IS_IRONLAKE_M(dev)) {
+               ironlake_enable_drps(dev);
+               intel_init_emon(dev);
+       }
+
+       if (IS_GEN6(dev) || IS_GEN7(dev)) {
+               gen6_enable_rps(dev_priv);
+               gen6_update_ring_freq(dev_priv);
+       }
+}
+
 void intel_modeset_init(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
@@ -9575,17 +9592,7 @@ void intel_modeset_init(struct drm_device *dev)
        i915_disable_vga(dev);
        intel_setup_outputs(dev);
 
-       intel_init_clock_gating(dev);
-
-       if (IS_IRONLAKE_M(dev)) {
-               ironlake_enable_drps(dev);
-               intel_init_emon(dev);
-       }
-
-       if (IS_GEN6(dev) || IS_GEN7(dev)) {
-               gen6_enable_rps(dev_priv);
-               gen6_update_ring_freq(dev_priv);
-       }
+       intel_modeset_init_hw(dev);
 
        INIT_WORK(&dev_priv->idle_work, intel_idle_update);
        setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,