ARM64: dts: meson-gxbb: add MMC support
authorKevin Hilman <khilman@baylibre.com>
Thu, 23 Jun 2016 19:01:23 +0000 (12:01 -0700)
committerKevin Hilman <khilman@baylibre.com>
Mon, 15 Aug 2016 23:12:11 +0000 (16:12 -0700)
Add binding and basic support for the SD/eMMC controller on Amlogic
S905/GXBB devices.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt
new file mode 100644 (file)
index 0000000..39cbe52
--- /dev/null
@@ -0,0 +1,29 @@
+Amlogic SD / eMMC controller for S905/GXBB family SoCs
+
+The MMC 5.1 compliant host controller on Amlogic provides the
+interface for SD, eMMC and SDIO devices.
+
+This file documents the properties in addition to those available in
+the MMC core bindings, documented by mmc.txt.
+
+Required properties:
+- compatible : contains "amlogic,meson-gxbb-mmc"
+- clocks     : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
+- clock-names: Should contain the following:
+       "core" - Main peripheral bus clock
+       "clkin0" - Parent clock of internal mux
+       "clkin1" - Other parent clock of internal mux
+  The driver has an interal mux clock which switches between clkin0 and clkin1 depending on the
+  clock rate requested by the MMC core.
+
+Example:
+
+       sd_emmc_a: mmc@70000 {
+               compatible = "amlogic,meson-gxbb-mmc";
+               reg = <0x0 0x70000 0x0 0x2000>;
+                interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+               clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
+               clock-names = "core", "clkin0", "clkin1";
+               pinctrl-0 = <&emmc_pins>;
+       };
+
index 90a84c514d3d6504ceecd38206d3dd6049c35d03..cba3ea16dfd1245f318bf2390db8f39dc7da8b3f 100644 (file)
                        default-state = "off";
                };
        };
+
+       mmc_iv: gpio-regulator {
+               compatible = "regulator-gpio";
+
+               regulator-name = "mmc-gpio-supply";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+               gpios-states = <0>;
+
+               /*
+                * Based on ODROID-C2 schematics:
+                * signal name: IO_TF_3V3N_1V8, GPIOAO bit 3
+                */
+               states = <3300000 0
+                         1800000 1>;
+       };
+
+       vcc1v8: regulator-vcc1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+
+       vcc3v3: regulator-vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       emmc_pwrseq: emmc-pwrseq {
+               compatible = "mmc-pwrseq-emmc";
+               reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+       };
 };
 
 &uart_AO {
        pinctrl-names = "default";
 };
 
+&sd_emmc_b {
+       status = "okay";
+       pinctrl-0 = <&sdcard_pins>;
+       pinctrl-names = "default";
+
+       bus-width = <4>;
+       cap-sd-highspeed;
+       max-frequency = <100000000>;
+
+       cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+       cd-inverted;
+
+       vmmc-supply = <&mmc_iv>;
+       voltage-ranges = <1800 3300>;
+};
+
+&sd_emmc_c {
+       status = "okay";
+       pinctrl-0 = <&emmc_pins>;
+       pinctrl-names = "default";
+
+       bus-width = <8>;
+       cap-sd-highspeed;
+       max-frequency = <200000000>;
+       non-removable;
+       disable-wp;
+       cap-mmc-highspeed;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+
+       mmc-pwrseq = <&emmc_pwrseq>;
+       voltage-ranges = <1800 3300>;
+       vmmc-supply = <&vcc3v3>;
+       vmmcq-sumpply = <&vcc1v8>;
+};
index f4f30f674b4c1809f8cdd85631536bbf5eff5667..e118754ece21c97ad24b18cf7845b15e3bf050cd 100644 (file)
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x40000000>;
        };
+
+       mmc_iv: gpio-regulator {
+               compatible = "regulator-gpio";
+
+               regulator-name = "mmc-gpio-supply";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+
+               /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
+               states = <1800000 0
+                         3300000 1>;
+       };
+
+       vddio_boot: regulator-vddio_boot {
+               compatible = "regulator-fixed";
+               regulator-name = "VDDIO_BOOT";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+
+       vcc_3v3: regulator-vcc_3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       emmc_pwrseq: emmc-pwrseq {
+               compatible = "mmc-pwrseq-emmc";
+               reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+       };
 };
 
 /* This UART is brought out to the DB9 connector */
        pinctrl-names = "default";
 };
 
+&sd_emmc_b {
+       status = "okay";
+       pinctrl-0 = <&sdcard_pins>;
+       pinctrl-names = "default";
+
+       bus-width = <4>;
+       cap-sd-highspeed;
+       max-frequency = <100000000>;
+
+       cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+       cd-inverted;
+
+       voltage-ranges = <1800 3300>;
+       vmmc-supply = <&mmc_iv>;
+};
+
+&sd_emmc_c {
+       status = "okay";
+       pinctrl-0 = <&emmc_pins>;
+       pinctrl-names = "default";
+
+       bus-width = <8>;
+       cap-sd-highspeed;
+       cap-mmc-highspeed;
+       max-frequency = <200000000>;
+       non-removable;
+       disable-wp;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+
+       mmc-pwrseq = <&emmc_pwrseq>;
+       voltage-ranges = <1800 3300>;
+       vmmc-supply = <&vcc_3v3>;
+       vmmcq-sumpply = <&vddio_boot>;
+};
index e502c24b0ac79cca089c7f22e19c83e3ea9bf2d4..3723007146ac9ea29b87ca334a1f9ffa18dfae28 100644 (file)
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
+#include <dt-bindings/clock/gxbb-clkc.h>
 
 / {
        compatible = "amlogic,meson-gxbb";
                                        mux {
                                                groups = "emmc_nand_d07",
                                                       "emmc_cmd",
-                                                      "emmc_clk";
+                                                      "emmc_clk",
+                                                      "emmc_ds";
                                                function = "emmc";
                                        };
                                };
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
+
+                       sd_emmc_a: mmc@70000 {
+                               compatible = "amlogic,meson-gxbb-mmc";
+                               reg = <0x0 0x70000 0x0 0x2000>;
+                               interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+                               clocks = <&clkc CLKID_SD_EMMC_A>,
+                                        <&xtal>,
+                                        <&clkc CLKID_FCLK_DIV2>;
+                               clock-names = "core", "clkin0", "clkin1";
+                               status = "disabled";
+                       };
+
+                       sd_emmc_b: mmc@72000 {
+                               compatible = "amlogic,meson-gxbb-mmc";
+                               reg = <0x0 0x72000 0x0 0x2000>;
+                               interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+                               clocks = <&clkc CLKID_SD_EMMC_B>,
+                                        <&xtal>,
+                                        <&clkc CLKID_FCLK_DIV2>;
+                               clock-names = "core", "clkin0", "clkin1";
+                               status = "disabled";
+                       };
+
+                       sd_emmc_c: mmc@74000 {
+                               compatible = "amlogic,meson-gxbb-mmc";
+                               reg = <0x0 0x74000 0x0 0x2000>;
+                               interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
+                               clocks = <&clkc CLKID_SD_EMMC_C>,
+                                        <&xtal>,
+                                        <&clkc CLKID_FCLK_DIV2>;
+                               clock-names = "core", "clkin0", "clkin1";
+                               status = "disabled";
+                       };
                };
 
                ethmac: ethernet@c9410000 {
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