drm/exynos: fimd: harden fimd_calc_clkdiv()

Don't use the vrefresh field of the DRM mode since this
one is supposed to only be used for debug purpose.
Instead use the clock field which should also provide
much more precise information.

Also sanitize the case in which the clock value
should be zero. We then just default to the maximum
clock divisor.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index cec508f9a33509a3507c55cf366425b6717c45c0..3efe1aa89416701223745cec1ec587fb3ef0e2db 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -397,9 +397,16 @@ static void fimd_clear_channels(struct exynos_drm_crtc *crtc)
 static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
                const struct drm_display_mode *mode)
 {
-       unsigned long ideal_clk = mode->htotal * mode->vtotal * mode->vrefresh;
+       unsigned long ideal_clk;
        u32 clkdiv;
 
+       if (mode->clock == 0) {
+               DRM_ERROR("Mode has zero clock value.\n");
+               return 0xff;
+       }
+
+       ideal_clk = mode->clock * 1000;
+
        if (ctx->i80_if) {
                /*
                 * The frame done interrupt should be occurred prior to the