From: Alex Deucher Date: Tue, 20 Mar 2012 21:18:34 +0000 (-0400) Subject: drm/radeon/kms/DCE6.1: ss is not supported on the internal pplls X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=0671bdd7983c4df674cd0fce263a44cd87bd36d2;p=deliverable%2Flinux.git drm/radeon/kms/DCE6.1: ss is not supported on the internal pplls It's handled via external clock. It should already be protected by the external ss flag, but add an explicit check just in case. Signed-off-by: Alex Deucher Signed-off-by: Dave Airlie --- diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index a5c4e3fa6bb2..083b3eada001 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -474,7 +474,7 @@ static void atombios_crtc_program_ss(struct radeon_device *rdev, return; } args.v3.ucEnable = enable; - if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK)) + if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK) || ASIC_IS_DCE61(rdev)) args.v3.ucEnable = ATOM_DISABLE; } else if (ASIC_IS_DCE4(rdev)) { args.v2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage);