From: Ben Skeggs Date: Thu, 20 Aug 2015 04:54:21 +0000 (+1000) Subject: drm/nouveau/cipher: convert to new-style nvkm_engine X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=14d74acafb15fd3fac16eef89de7643cddd01775;p=deliverable%2Flinux.git drm/nouveau/cipher: convert to new-style nvkm_engine Signed-off-by: Ben Skeggs --- diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/cipher.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/cipher.h index 57c29e91bad5..03fa57a7c30a 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/cipher.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/cipher.h @@ -1,5 +1,5 @@ #ifndef __NVKM_CIPHER_H__ #define __NVKM_CIPHER_H__ #include -extern struct nvkm_oclass g84_cipher_oclass; +int g84_cipher_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c index ae371ca64146..d3a35db85fba 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c @@ -77,10 +77,10 @@ g84_cipher_intr_mask[] = { }; static void -g84_cipher_intr(struct nvkm_subdev *subdev) +g84_cipher_intr(struct nvkm_engine *cipher) { - struct nvkm_engine *cipher = (void *)subdev; - struct nvkm_device *device = cipher->subdev.device; + struct nvkm_subdev *subdev = &cipher->subdev; + struct nvkm_device *device = subdev->device; struct nvkm_fifo *fifo = device->fifo; struct nvkm_fifo_chan *chan; u32 stat = nvkm_rd32(device, 0x102130); @@ -105,8 +105,20 @@ g84_cipher_intr(struct nvkm_subdev *subdev) nvkm_wr32(device, 0x10200c, 0x10); } +static int +g84_cipher_init(struct nvkm_engine *cipher) +{ + struct nvkm_device *device = cipher->subdev.device; + nvkm_wr32(device, 0x102130, 0xffffffff); + nvkm_wr32(device, 0x102140, 0xffffffbf); + nvkm_wr32(device, 0x10200c, 0x00000010); + return 0; +} + static const struct nvkm_engine_func g84_cipher = { + .init = g84_cipher_init, + .intr = g84_cipher_intr, .cclass = &g84_cipher_cclass, .sclass = { { -1, -1, NV74_CIPHER, &g84_cipher_oclass_func }, @@ -114,50 +126,10 @@ g84_cipher = { } }; -static int -g84_cipher_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +g84_cipher_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_engine *cipher; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCIPHER", "cipher", &cipher); - *pobject = nv_object(cipher); - if (ret) - return ret; - - cipher->func = &g84_cipher, - nv_subdev(cipher)->unit = 0x00004000; - nv_subdev(cipher)->intr = g84_cipher_intr; - return 0; + return nvkm_engine_new_(&g84_cipher, device, index, + 0x00004000, true, pengine); } - -static int -g84_cipher_init(struct nvkm_object *object) -{ - struct nvkm_engine *cipher = (void *)object; - struct nvkm_device *device = cipher->subdev.device; - int ret; - - ret = nvkm_engine_init_old(cipher); - if (ret) - return ret; - - nvkm_wr32(device, 0x102130, 0xffffffff); - nvkm_wr32(device, 0x102140, 0xffffffbf); - nvkm_wr32(device, 0x10200c, 0x00000010); - return 0; -} - -struct nvkm_oclass -g84_cipher_oclass = { - .handle = NV_ENGINE(CIPHER, 0x84), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = g84_cipher_ctor, - .dtor = _nvkm_engine_dtor, - .init = g84_cipher_init, - .fini = _nvkm_engine_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 926e07fe0912..e9ed83563028 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -898,7 +898,7 @@ nv84_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -929,7 +929,7 @@ nv86_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -960,7 +960,7 @@ nv92_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -991,7 +991,7 @@ nv94_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g94_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -1027,7 +1027,7 @@ nv96_chipset = { // .gr = nv50_gr_new, // .mpeg = g84_mpeg_new, .vp = g84_vp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, .bsp = g84_bsp_new, // .disp = g94_disp_new, // .pm = g84_pm_new, @@ -1084,7 +1084,7 @@ nva0_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = gt200_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 35cc167e7b06..087edc8d412c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -42,7 +42,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -52,7 +51,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -62,7 +60,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -72,7 +69,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -82,7 +78,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -100,7 +95,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt200_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass; break;