From: Saeed Bishara <saeed@marvell.com>
Date: Wed, 2 Jul 2008 17:06:32 +0000 (-1100)
Subject: [ARM] Feroceon: don't disable BPU on boot
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=188237e28d7fece0471640ba86f6d8cd164ed085;p=deliverable%2Flinux.git

[ARM] Feroceon: don't disable BPU on boot

On Feroceon platforms that have a branch prediction unit, bit 11 of the
cp15 control register controls the BPU.  This patch keeps the old value
of this bit instead of always clearing it.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
---

diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 63ca1ea5c267..f2e5884c513a 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -493,14 +493,15 @@ __feroceon_setup:
 	.size	__feroceon_setup, . - __feroceon_setup
 
 	/*
-	 *  R
-	 * .RVI ZFRS BLDP WCAM
-	 * .011 0001 ..11 0101
+	 *      B
+	 *  R   P
+	 * .RVI UFRS BLDP WCAM
+	 * .011 .001 ..11 0101
 	 *
 	 */
 	.type	feroceon_crval, #object
 feroceon_crval:
-	crval	clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134
+	crval	clear=0x0000773f, mmuset=0x00003135, ucset=0x00001134
 
 	__INITDATA