From: Michel Pollet <buserror@gmail.com>
Date: Wed, 27 Jan 2010 16:38:08 +0000 (+0000)
Subject: ARM: S3C2412: SoC has the fractional baud rate register
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=21030403209f0c253d462492f881c613bd8eeda2;p=deliverable%2Flinux.git

ARM: S3C2412: SoC has the fractional baud rate register

The S3C2412 has a fractional baud rate register, this patch adds the
corresponding flag to the UART definition to allow generation of more
precise baud rates for the various clock combinations.

Signed-off-by: Michel Pollet <buserror@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---

diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28e36ef..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
 	.name		= "Samsung S3C2412 UART",
 	.type		= PORT_S3C2412,
 	.fifosize	= 64,
+	.has_divslot	= 1,
 	.rx_fifomask	= S3C2440_UFSTAT_RXMASK,
 	.rx_fifoshift	= S3C2440_UFSTAT_RXSHIFT,
 	.rx_fifofull	= S3C2440_UFSTAT_RXFULL,