From: Daniel Cotey <puff65537@bansheeslibrary.com>
Date: Sat, 15 Sep 2012 13:03:43 +0000 (-0700)
Subject: Staging: silicom: bp_mod.h: checkpatch tab and space cleanup
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=22f3504684b3fc4e452db60f54419f109fdb4260;p=deliverable%2Flinux.git

Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

seventh chunk of bp_mod.h's cleanup

Signed-off-by: Daniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h
index bc5ef43aed96..a11b8093f18a 100644
--- a/drivers/staging/silicom/bp_mod.h
+++ b/drivers/staging/silicom/bp_mod.h
@@ -373,33 +373,33 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
 
 #define PEGF5_IF_SERIES(pid) \
 	((pid == SILICOM_PEG2BPFI5_SSID) || \
-          (pid==SILICOM_PEG2BPFI5LX_SSID)|| \
-          (pid==SILICOM_PEG4BPFI6_SSID)|| \
-          (pid==SILICOM_PEG4BPFI6LX_SSID)|| \
-           (pid==SILICOM_PEG4BPFI6ZX_SSID)|| \
-           (pid==SILICOM_PEG2BPFI6_SSID)|| \
-           (pid==SILICOM_PEG2BPFI6LX_SSID)|| \
-           (pid==SILICOM_PEG2BPFI6ZX_SSID)|| \
-           (pid==SILICOM_PEG2BPFI6FLXM_SSID)|| \
-           (pid==SILICOM_PEG2DBFI6_SSID)|| \
-           (pid==SILICOM_PEG2DBFI6LX_SSID)|| \
-           (pid==SILICOM_PEG2DBFI6ZX_SSID)|| \
-           (pid==SILICOM_PEG4BPI6FC_SSID)|| \
-           (pid==SILICOM_PEG4BPFI6FCLX_SSID)|| \
-           (pid==SILICOM_PEG4BPI6FC_SSID)|| \
-           (pid==SILICOM_M1EG2BPFI6_SSID)|| \
-           (pid==SILICOM_M1EG2BPFI6LX_SSID)|| \
-           (pid==SILICOM_M1EG2BPFI6ZX_SSID)|| \
-           (pid==SILICOM_M1EG4BPFI6_SSID)|| \
-           (pid==SILICOM_M1EG4BPFI6LX_SSID)|| \
-           (pid==SILICOM_M1EG4BPFI6ZX_SSID)|| \
-           (pid==SILICOM_M2EG2BPFI6_SSID)|| \
-           (pid==SILICOM_M2EG2BPFI6LX_SSID)|| \
-           (pid==SILICOM_M2EG2BPFI6ZX_SSID)|| \
-           (pid==SILICOM_M2EG4BPFI6_SSID)|| \
-           (pid==SILICOM_M2EG4BPFI6LX_SSID)|| \
-           (pid==SILICOM_M2EG4BPFI6ZX_SSID)|| \
-           (pid==SILICOM_PEG4BPFI6FCZX_SSID))
+	 (pid == SILICOM_PEG2BPFI5LX_SSID) || \
+	 (pid == SILICOM_PEG4BPFI6_SSID) || \
+	 (pid == SILICOM_PEG4BPFI6LX_SSID) || \
+	 (pid == SILICOM_PEG4BPFI6ZX_SSID) || \
+	 (pid == SILICOM_PEG2BPFI6_SSID) || \
+	 (pid == SILICOM_PEG2BPFI6LX_SSID) || \
+	 (pid == SILICOM_PEG2BPFI6ZX_SSID) || \
+	 (pid == SILICOM_PEG2BPFI6FLXM_SSID) || \
+	 (pid == SILICOM_PEG2DBFI6_SSID) || \
+	 (pid == SILICOM_PEG2DBFI6LX_SSID) || \
+	 (pid == SILICOM_PEG2DBFI6ZX_SSID) || \
+	 (pid == SILICOM_PEG4BPI6FC_SSID) || \
+	 (pid == SILICOM_PEG4BPFI6FCLX_SSID) || \
+	 (pid == SILICOM_PEG4BPI6FC_SSID) || \
+	 (pid == SILICOM_M1EG2BPFI6_SSID) || \
+	 (pid == SILICOM_M1EG2BPFI6LX_SSID) || \
+	 (pid == SILICOM_M1EG2BPFI6ZX_SSID) || \
+	 (pid == SILICOM_M1EG4BPFI6_SSID) || \
+	 (pid == SILICOM_M1EG4BPFI6LX_SSID) || \
+	 (pid == SILICOM_M1EG4BPFI6ZX_SSID) || \
+	 (pid == SILICOM_M2EG2BPFI6_SSID) || \
+	 (pid == SILICOM_M2EG2BPFI6LX_SSID) || \
+	 (pid == SILICOM_M2EG2BPFI6ZX_SSID) || \
+	 (pid == SILICOM_M2EG4BPFI6_SSID) || \
+	 (pid == SILICOM_M2EG4BPFI6LX_SSID) || \
+	 (pid == SILICOM_M2EG4BPFI6ZX_SSID) || \
+	 (pid == SILICOM_PEG4BPFI6FCZX_SSID))
 
 #define PEG5_IF_SERIES(pid) \
 ((pid==SILICOM_PEG4BPI6_SSID)|| \