From: Palmer Dabbelt <palmer@dabbelt.com>
Date: Fri, 6 Oct 2017 19:06:45 +0000 (-0700)
Subject: RISC-V: Don't emit 2-byte NOPs if the C extension is disabled
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=2c3f27ed0d6a91bc0812bb2fc6965fd03a413fee;hp=fee0ea1f2d3079f7fc3d48109c2a81cc7b7f241c;p=deliverable%2Fbinutils-gdb.git

RISC-V: Don't emit 2-byte NOPs if the C extension is disabled

Systems without the C extension mandate 4-byte alignment for
instructions, so there is no reason to allow for 2-byte alignment.  This
change avoids emitting lots of unimplemented instructions into object
files on non-C targets, which users keep reporting as a bug.  While this
isn't actually a bug (as none of the offsets in object files are
relevant until RISC-V), it is ugly.

gas/ChangeLog

2017-10-23  Palmer Dabbelt  <palmer@dabbelt.com>

        * config/tc-riscv.c (riscv_frag_align_code): Align code by 4
        bytes on non-RVC systems.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f095421ee6..bb1aa01da9 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2017-10-23  Palmer Dabbelt  <palmer@dabbelt.com>
+
+        * config/tc-riscv.c (riscv_frag_align_code): Align code by 4
+        bytes on non-RVC systems.
+
 2017-10-23  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* config/tc-mips.c (mips_elf_final_processing): Don't set
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 189e40d11c..f4276c9fb5 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -2277,7 +2277,7 @@ bfd_boolean
 riscv_frag_align_code (int n)
 {
   bfd_vma bytes = (bfd_vma) 1 << n;
-  bfd_vma worst_case_bytes = bytes - 2;
+  bfd_vma worst_case_bytes = bytes - (riscv_opts.rvc ? 2 : 4);
   char *nops = frag_more (worst_case_bytes);
   expressionS ex;