From: Maciej W. Rozycki <macro@imgtec.com>
Date: Thu, 8 Dec 2016 23:29:37 +0000 (+0000)
Subject: MIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=39f66f3ae25ebd3a065218ce880280fd5b4b861c;p=deliverable%2Fbinutils-gdb.git

MIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'

	opcodes/
	* mips-dis.c (print_mips16_insn_arg): Remove extraneous
	indentation space across.
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 70f91502c9..1e5ca72310 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Remove extraneous
+	indentation space across.
+
 2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 19d0366e8f..c23e369972 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1914,36 +1914,36 @@ print_mips16_insn_arg (struct disassemble_info *info,
 	  if (!pcrel_op->include_isa_bit && use_extend)
 	    baseaddr = memaddr - 2;
 	  else if (!pcrel_op->include_isa_bit)
-	     {
-	       bfd_byte buffer[2];
-
-	       /* If this instruction is in the delay slot of a JAL/JALX
-		  instruction, the base address is the address of the
-		  JAL/JALX instruction.  If it is in the delay slot of
-		  a JR/JALR instruction, the base address is the address
-		  of the JR/JALR instruction.  This test is unreliable:
-		  we have no way of knowing whether the previous word is
-		  instruction or data.  */
-	       if (info->read_memory_func (memaddr - 4, buffer, 2, info) == 0
-		   && (((info->endian == BFD_ENDIAN_BIG
-			 ? bfd_getb16 (buffer)
-			 : bfd_getl16 (buffer))
-			& 0xf800) == 0x1800))
-		 baseaddr = memaddr - 4;
-	       else if (info->read_memory_func (memaddr - 2, buffer, 2,
-						info) == 0
-			&& (((info->endian == BFD_ENDIAN_BIG
-			      ? bfd_getb16 (buffer)
-			      : bfd_getl16 (buffer))
-			     & 0xf89f) == 0xe800)
-			&& (((info->endian == BFD_ENDIAN_BIG
-			      ? bfd_getb16 (buffer)
-			      : bfd_getl16 (buffer))
-			     & 0x0060) != 0x0060))
-		 baseaddr = memaddr - 2;
-	       else
-		 baseaddr = memaddr;
-	     }
+	    {
+	      bfd_byte buffer[2];
+
+	      /* If this instruction is in the delay slot of a JAL/JALX
+		 instruction, the base address is the address of the
+		 JAL/JALX instruction.  If it is in the delay slot of
+		 a JR/JALR instruction, the base address is the address
+		 of the JR/JALR instruction.  This test is unreliable:
+		 we have no way of knowing whether the previous word is
+		 instruction or data.  */
+	      if (info->read_memory_func (memaddr - 4, buffer, 2, info) == 0
+		  && (((info->endian == BFD_ENDIAN_BIG
+			? bfd_getb16 (buffer)
+			: bfd_getl16 (buffer))
+		       & 0xf800) == 0x1800))
+		baseaddr = memaddr - 4;
+	      else if (info->read_memory_func (memaddr - 2, buffer, 2,
+					       info) == 0
+		       && (((info->endian == BFD_ENDIAN_BIG
+			     ? bfd_getb16 (buffer)
+			     : bfd_getl16 (buffer))
+			    & 0xf89f) == 0xe800)
+		       && (((info->endian == BFD_ENDIAN_BIG
+			     ? bfd_getb16 (buffer)
+			     : bfd_getl16 (buffer))
+			    & 0x0060) != 0x0060))
+		baseaddr = memaddr - 2;
+	      else
+		baseaddr = memaddr;
+	    }
 	}
 
       print_insn_arg (info, state, opcode, operand, baseaddr + 1, uval);