From: Sivaram Nair <sivaramn@nvidia.com>
Date: Tue, 20 Nov 2012 07:29:16 +0000 (+0200)
Subject: ARM: tegra: select correct parent clk for pll_p
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=6eb583da959cf751eb951cc5ff488dd4e41f1b2f;p=deliverable%2Flinux.git

ARM: tegra: select correct parent clk for pll_p

For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.

Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 0b0a5f556d34..988549a77b69 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
 static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
 	/* name		parent		rate		enabled */
 	{ "clk_m",	NULL,		0,		true },
-	{ "pll_p",	"clk_m",	408000000,	true },
+	{ "pll_p",	"pll_ref",	408000000,	true },
 	{ "pll_p_out1",	"pll_p",	9600000,	true },
 	{ NULL,		NULL,		0,		0},
 };