From: Todd Poynor Date: Fri, 24 Jun 2011 07:04:17 +0000 (+0900) Subject: [CPUFREQ] S5PV210: Adjust udelay prior to voltage scaling down X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=74df8e69e901e624fe0b439f914aa7be66201154;p=deliverable%2Flinux.git [CPUFREQ] S5PV210: Adjust udelay prior to voltage scaling down Voltage scaling accesses the MAX8998 regulators over bit-banged I2C with lots of udelays. In the case of decreasing CPU speed, the number of loops per us for udelay needs to be adjusted prior to decreasing voltage to avoid delaying for up to 10X too long. Signed-off-by: Todd Poynor Signed-off-by: Jonghwan Choi Signed-off-by: Kukjin Kim Signed-off-by: Dave Jones --- diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c index 7fba356d2729..155242cfc714 100644 --- a/drivers/cpufreq/s5pv210-cpufreq.c +++ b/drivers/cpufreq/s5pv210-cpufreq.c @@ -467,6 +467,8 @@ static int s5pv210_target(struct cpufreq_policy *policy, } } + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + if (freqs.new < freqs.old) { regulator_set_voltage(int_regulator, int_volt, int_volt_max); @@ -475,8 +477,6 @@ static int s5pv210_target(struct cpufreq_policy *policy, arm_volt, arm_volt_max); } - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - printk(KERN_DEBUG "Perf changed[L%d]\n", index); exit: