From: H Hartley Sweeten Date: Wed, 16 Jul 2014 17:43:37 +0000 (-0700) Subject: staging: comedi: ni_tio: checkpatch.pl cleanup (break is not useful) X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=9bad91337cacc7dcc857a9604e498025d4cc19e9;p=deliverable%2Flinux.git staging: comedi: ni_tio: checkpatch.pl cleanup (break is not useful) Fix the checkpatch.pl warnings: WARNING: break is not useful after a goto or return Signed-off-by: H Hartley Sweeten Cc: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c index 92691b491c24..a25e2f5d83ab 100644 --- a/drivers/staging/comedi/drivers/ni_tio.c +++ b/drivers/staging/comedi/drivers/ni_tio.c @@ -60,13 +60,10 @@ static inline enum Gi_Counting_Mode_Reg_Bits Gi_Alternate_Sync_Bit(enum switch (variant) { case ni_gpct_variant_e_series: return 0; - break; case ni_gpct_variant_m_series: return Gi_M_Series_Alternate_Sync_Bit; - break; case ni_gpct_variant_660x: return Gi_660x_Alternate_Sync_Bit; - break; default: BUG(); break; @@ -81,13 +78,10 @@ static inline enum Gi_Counting_Mode_Reg_Bits Gi_Prescale_X2_Bit(enum switch (variant) { case ni_gpct_variant_e_series: return 0; - break; case ni_gpct_variant_m_series: return Gi_M_Series_Prescale_X2_Bit; - break; case ni_gpct_variant_660x: return Gi_660x_Prescale_X2_Bit; - break; default: BUG(); break; @@ -102,13 +96,10 @@ static inline enum Gi_Counting_Mode_Reg_Bits Gi_Prescale_X8_Bit(enum switch (variant) { case ni_gpct_variant_e_series: return 0; - break; case ni_gpct_variant_m_series: return Gi_M_Series_Prescale_X8_Bit; - break; case ni_gpct_variant_660x: return Gi_660x_Prescale_X8_Bit; - break; default: BUG(); break; @@ -123,13 +114,10 @@ static inline enum Gi_Counting_Mode_Reg_Bits Gi_HW_Arm_Select_Mask(enum switch (variant) { case ni_gpct_variant_e_series: return 0; - break; case ni_gpct_variant_m_series: return Gi_M_Series_HW_Arm_Select_Mask; - break; case ni_gpct_variant_660x: return Gi_660x_HW_Arm_Select_Mask; - break; default: BUG(); break; @@ -331,11 +319,9 @@ static int ni_tio_second_gate_registers_present(const struct ni_gpct_device switch (counter_dev->variant) { case ni_gpct_variant_e_series: return 0; - break; case ni_gpct_variant_m_series: case ni_gpct_variant_660x: return 1; - break; default: BUG(); break; @@ -704,7 +690,6 @@ static void ni_tio_set_source_subselect(struct ni_gpct *counter, /* Gi_Source_Subselect doesn't matter */ default: return; - break; } write_register(counter, counter_dev->regs[second_gate_reg], second_gate_reg); @@ -757,7 +742,6 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter, break; default: return -EINVAL; - break; } ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx), Gi_Prescale_X2_Bit(counter_dev->variant) | @@ -915,10 +899,8 @@ static unsigned ni_tio_generic_clock_src_select(const struct ni_gpct *counter) case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: return ni_m_series_clock_src_select(counter); - break; case ni_gpct_variant_660x: return ni_660x_clock_src_select(counter); - break; default: BUG(); break; @@ -947,7 +929,6 @@ static uint64_t ni_tio_clock_period_ps(const struct ni_gpct *counter, default: /* clock period is specified by user with prescaling already taken into account. */ return counter->clock_period_ps; - break; } switch (generic_clock_source & NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK) { @@ -1035,7 +1016,6 @@ static int ni_660x_set_first_gate(struct ni_gpct *counter, if (i <= ni_660x_max_gate_pin) break; return -EINVAL; - break; } ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), Gi_Gate_Select_Mask, @@ -1084,7 +1064,6 @@ static int ni_m_series_set_first_gate(struct ni_gpct *counter, if (i <= ni_m_series_max_pfi_channel) break; return -EINVAL; - break; } ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), Gi_Gate_Select_Mask, @@ -1140,7 +1119,6 @@ static int ni_660x_set_second_gate(struct ni_gpct *counter, if (i <= ni_660x_max_up_down_pin) break; return -EINVAL; - break; } counter_dev->regs[second_gate_reg] |= Gi_Second_Gate_Mode_Bit; counter_dev->regs[second_gate_reg] &= ~Gi_Second_Gate_Select_Mask; @@ -1199,10 +1177,8 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index, case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: return ni_m_series_set_first_gate(counter, gate_source); - break; case ni_gpct_variant_660x: return ni_660x_set_first_gate(counter, gate_source); - break; default: BUG(); break; @@ -1230,10 +1206,8 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index, case ni_gpct_variant_m_series: return ni_m_series_set_second_gate(counter, gate_source); - break; case ni_gpct_variant_660x: return ni_660x_set_second_gate(counter, gate_source); - break; default: BUG(); break; @@ -1241,7 +1215,6 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index, break; default: return -EINVAL; - break; } return 0; } @@ -1269,7 +1242,6 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned index, break; default: return -EINVAL; - break; } mask = 0x1f << shift; if (source > 0x1f) { @@ -1292,24 +1264,18 @@ static unsigned ni_660x_first_gate_to_generic_gate_source(unsigned switch (ni_660x_gate_select) { case NI_660x_Source_Pin_i_Gate_Select: return NI_GPCT_SOURCE_PIN_i_GATE_SELECT; - break; case NI_660x_Gate_Pin_i_Gate_Select: return NI_GPCT_GATE_PIN_i_GATE_SELECT; - break; case NI_660x_Next_SRC_Gate_Select: return NI_GPCT_NEXT_SOURCE_GATE_SELECT; - break; case NI_660x_Next_Out_Gate_Select: return NI_GPCT_NEXT_OUT_GATE_SELECT; - break; case NI_660x_Logic_Low_Gate_Select: return NI_GPCT_LOGIC_LOW_GATE_SELECT; - break; default: for (i = 0; i <= ni_660x_max_rtsi_channel; ++i) { if (ni_660x_gate_select == NI_660x_RTSI_Gate_Select(i)) { return NI_GPCT_RTSI_GATE_SELECT(i); - break; } } if (i <= ni_660x_max_rtsi_channel) @@ -1318,7 +1284,6 @@ static unsigned ni_660x_first_gate_to_generic_gate_source(unsigned if (ni_660x_gate_select == NI_660x_Gate_Pin_Gate_Select(i)) { return NI_GPCT_GATE_PIN_GATE_SELECT(i); - break; } } if (i <= ni_660x_max_gate_pin) @@ -1337,34 +1302,25 @@ static unsigned ni_m_series_first_gate_to_generic_gate_source(unsigned switch (ni_m_series_gate_select) { case NI_M_Series_Timestamp_Mux_Gate_Select: return NI_GPCT_TIMESTAMP_MUX_GATE_SELECT; - break; case NI_M_Series_AI_START2_Gate_Select: return NI_GPCT_AI_START2_GATE_SELECT; - break; case NI_M_Series_PXI_Star_Trigger_Gate_Select: return NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT; - break; case NI_M_Series_Next_Out_Gate_Select: return NI_GPCT_NEXT_OUT_GATE_SELECT; - break; case NI_M_Series_AI_START1_Gate_Select: return NI_GPCT_AI_START1_GATE_SELECT; - break; case NI_M_Series_Next_SRC_Gate_Select: return NI_GPCT_NEXT_SOURCE_GATE_SELECT; - break; case NI_M_Series_Analog_Trigger_Out_Gate_Select: return NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT; - break; case NI_M_Series_Logic_Low_Gate_Select: return NI_GPCT_LOGIC_LOW_GATE_SELECT; - break; default: for (i = 0; i <= ni_m_series_max_rtsi_channel; ++i) { if (ni_m_series_gate_select == NI_M_Series_RTSI_Gate_Select(i)) { return NI_GPCT_RTSI_GATE_SELECT(i); - break; } } if (i <= ni_m_series_max_rtsi_channel) @@ -1373,7 +1329,6 @@ static unsigned ni_m_series_first_gate_to_generic_gate_source(unsigned if (ni_m_series_gate_select == NI_M_Series_PFI_Gate_Select(i)) { return NI_GPCT_PFI_GATE_SELECT(i); - break; } } if (i <= ni_m_series_max_pfi_channel) @@ -1392,28 +1347,21 @@ static unsigned ni_660x_second_gate_to_generic_gate_source(unsigned switch (ni_660x_gate_select) { case NI_660x_Source_Pin_i_Second_Gate_Select: return NI_GPCT_SOURCE_PIN_i_GATE_SELECT; - break; case NI_660x_Up_Down_Pin_i_Second_Gate_Select: return NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT; - break; case NI_660x_Next_SRC_Second_Gate_Select: return NI_GPCT_NEXT_SOURCE_GATE_SELECT; - break; case NI_660x_Next_Out_Second_Gate_Select: return NI_GPCT_NEXT_OUT_GATE_SELECT; - break; case NI_660x_Selected_Gate_Second_Gate_Select: return NI_GPCT_SELECTED_GATE_GATE_SELECT; - break; case NI_660x_Logic_Low_Second_Gate_Select: return NI_GPCT_LOGIC_LOW_GATE_SELECT; - break; default: for (i = 0; i <= ni_660x_max_rtsi_channel; ++i) { if (ni_660x_gate_select == NI_660x_RTSI_Second_Gate_Select(i)) { return NI_GPCT_RTSI_GATE_SELECT(i); - break; } } if (i <= ni_660x_max_rtsi_channel) @@ -1422,7 +1370,6 @@ static unsigned ni_660x_second_gate_to_generic_gate_source(unsigned if (ni_660x_gate_select == NI_660x_Up_Down_Pin_Second_Gate_Select(i)) { return NI_GPCT_UP_DOWN_PIN_GATE_SELECT(i); - break; } } if (i <= ni_660x_max_up_down_pin) @@ -1441,7 +1388,6 @@ static unsigned ni_m_series_second_gate_to_generic_gate_source(unsigned switch (ni_m_series_gate_select) { default: return ni_m_series_gate_select; - break; } return 0; }; @@ -1528,7 +1474,6 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index, break; default: return -EINVAL; - break; } return 0; } @@ -1543,39 +1488,29 @@ int ni_tio_insn_config(struct comedi_device *dev, switch (data[0]) { case INSN_CONFIG_SET_COUNTER_MODE: return ni_tio_set_counter_mode(counter, data[1]); - break; case INSN_CONFIG_ARM: return ni_tio_arm(counter, 1, data[1]); - break; case INSN_CONFIG_DISARM: ni_tio_arm(counter, 0, 0); return 0; - break; case INSN_CONFIG_GET_COUNTER_STATUS: data[1] = ni_tio_counter_status(counter); data[2] = counter_status_mask; return 0; - break; case INSN_CONFIG_SET_CLOCK_SRC: return ni_tio_set_clock_src(counter, data[1], data[2]); - break; case INSN_CONFIG_GET_CLOCK_SRC: ni_tio_get_clock_src(counter, &data[1], &data[2]); return 0; - break; case INSN_CONFIG_SET_GATE_SRC: return ni_tio_set_gate_src(counter, data[1], data[2]); - break; case INSN_CONFIG_GET_GATE_SRC: return ni_tio_get_gate_src(counter, data[1], &data[2]); - break; case INSN_CONFIG_SET_OTHER_SRC: return ni_tio_set_other_src(counter, data[1], data[2]); - break; case INSN_CONFIG_RESET: ni_tio_reset_count_and_disarm(counter); return 0; - break; default: break; } @@ -1618,7 +1553,6 @@ int ni_tio_insn_read(struct comedi_device *dev, correct_read = first_read; data[0] = correct_read; return 0; - break; case 1: data[0] = counter_dev->regs[NITIO_LOADA_REG(cidx)]; break; @@ -1676,7 +1610,6 @@ int ni_tio_insn_write(struct comedi_device *dev, break; default: return -EINVAL; - break; } return 0; }