From: H Hartley Sweeten <hsweeten@visionengravers.com>
Date: Mon, 14 Jul 2014 19:23:38 +0000 (-0700)
Subject: staging: comedi: mite.h: tidy up the mite channel register offsets
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=ba9a1e3f07fc43df5f1b8bd8b0c72d0c3bbf5e16;p=deliverable%2Flinux.git

staging: comedi: mite.h: tidy up the mite channel register offsets

Convert the inline MITE_* functions, used to calculate the mite channel
register offsets, into simple macros.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/comedi/drivers/mite.h b/drivers/staging/comedi/drivers/mite.h
index a4852cbd5b31..33d87a239532 100644
--- a/drivers/staging/comedi/drivers/mite.h
+++ b/drivers/staging/comedi/drivers/mite.h
@@ -107,11 +107,6 @@ void mite_prep_dma(struct mite_channel *mite_chan,
 int mite_buf_change(struct mite_dma_descriptor_ring *ring,
 		    struct comedi_subdevice *s);
 
-static inline int CHAN_OFFSET(int channel)
-{
-	return 0x500 + 0x100 * channel;
-};
-
 enum mite_registers {
 	/* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be
 	   written and read back.  The bits 0x1f always read as 1.
@@ -123,90 +118,25 @@ enum mite_registers {
 	MITE_PCI_CONFIG_OFFSET = 0x300,
 	MITE_CSIGR = 0x460	/* chip signature */
 };
-static inline int MITE_CHOR(int channel)
-{				/*  channel operation */
-	return CHAN_OFFSET(channel) + 0x0;
-};
-
-static inline int MITE_CHCR(int channel)
-{				/*  channel control */
-	return CHAN_OFFSET(channel) + 0x4;
-};
-
-static inline int MITE_TCR(int channel)
-{				/*  transfer count */
-	return CHAN_OFFSET(channel) + 0x8;
-};
-
-static inline int MITE_MCR(int channel)
-{				/*  memory configuration */
-	return CHAN_OFFSET(channel) + 0xc;
-};
-
-static inline int MITE_MAR(int channel)
-{				/*  memory address */
-	return CHAN_OFFSET(channel) + 0x10;
-};
-
-static inline int MITE_DCR(int channel)
-{				/*  device configuration */
-	return CHAN_OFFSET(channel) + 0x14;
-};
-
-static inline int MITE_DAR(int channel)
-{				/*  device address */
-	return CHAN_OFFSET(channel) + 0x18;
-};
-
-static inline int MITE_LKCR(int channel)
-{				/*  link configuration */
-	return CHAN_OFFSET(channel) + 0x1c;
-};
 
-static inline int MITE_LKAR(int channel)
-{				/*  link address */
-	return CHAN_OFFSET(channel) + 0x20;
-};
-
-static inline int MITE_LLKAR(int channel)
-{				/*  see mite section of tnt5002 manual */
-	return CHAN_OFFSET(channel) + 0x24;
-};
-
-static inline int MITE_BAR(int channel)
-{				/*  base address */
-	return CHAN_OFFSET(channel) + 0x28;
-};
-
-static inline int MITE_BCR(int channel)
-{				/*  base count */
-	return CHAN_OFFSET(channel) + 0x2c;
-};
-
-static inline int MITE_SAR(int channel)
-{				/*  ? address */
-	return CHAN_OFFSET(channel) + 0x30;
-};
-
-static inline int MITE_WSCR(int channel)
-{				/*  ? */
-	return CHAN_OFFSET(channel) + 0x34;
-};
-
-static inline int MITE_WSER(int channel)
-{				/*  ? */
-	return CHAN_OFFSET(channel) + 0x38;
-};
-
-static inline int MITE_CHSR(int channel)
-{				/*  channel status */
-	return CHAN_OFFSET(channel) + 0x3c;
-};
-
-static inline int MITE_FCR(int channel)
-{				/*  fifo count */
-	return CHAN_OFFSET(channel) + 0x40;
-};
+#define MITE_CHAN(x)	(0x500 + 0x100 * (x))
+#define MITE_CHOR(x)	(0x00 + MITE_CHAN(x))	/* channel operation */
+#define MITE_CHCR(x)	(0x04 + MITE_CHAN(x))	/* channel control */
+#define MITE_TCR(x)	(0x08 + MITE_CHAN(x))	/* transfer count */
+#define MITE_MCR(x)	(0x0c + MITE_CHAN(x))	/* memory configuration */
+#define MITE_MAR(x)	(0x10 + MITE_CHAN(x))	/* memory address */
+#define MITE_DCR(x)	(0x14 + MITE_CHAN(x))	/* device configuration */
+#define MITE_DAR(x)	(0x18 + MITE_CHAN(x))	/* device address */
+#define MITE_LKCR(x)	(0x1c + MITE_CHAN(x))	/* link configuration */
+#define MITE_LKAR(x)	(0x20 + MITE_CHAN(x))	/* link address */
+#define MITE_LLKAR(x)	(0x24 + MITE_CHAN(x))	/* see tnt5002 manual */
+#define MITE_BAR(x)	(0x28 + MITE_CHAN(x))	/* base address */
+#define MITE_BCR(x)	(0x2c + MITE_CHAN(x))	/* base count */
+#define MITE_SAR(x)	(0x30 + MITE_CHAN(x))	/* ? address */
+#define MITE_WSCR(x)	(0x34 + MITE_CHAN(x))	/* ? */
+#define MITE_WSER(x)	(0x38 + MITE_CHAN(x))	/* ? */
+#define MITE_CHSR(x)	(0x3c + MITE_CHAN(x))	/* channel status */
+#define MITE_FCR(x)	(0x40 + MITE_CHAN(x))	/* fifo count */
 
 enum MITE_IODWBSR_bits {
 	WENAB = 0x80,		/*  window enable */