From: H Hartley Sweeten Date: Tue, 4 Nov 2014 17:54:26 +0000 (-0700) Subject: staging: comedi: addi_apci_3120: define the timer 2 clock select bits X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=bd8e69e2b7bc51d5b5c97d3940ea42b3f816fb6b;p=deliverable%2Flinux.git staging: comedi: addi_apci_3120: define the timer 2 clock select bits For aesthetics, redefine the bits in the mode register used to select the clock for timer 2. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c index 87c82e4b76f5..c0ae6d31d0c9 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c @@ -103,7 +103,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY #define APCI3120_RD_STATUS 0x02 #define APCI3120_FC_TIMER 0x1000 -#define APCI3120_TIMER2_SELECT_EOS 0xc0 #define APCI3120_COUNTER 3 static int apci3120_ai_insn_config(struct comedi_device *dev, @@ -561,14 +560,12 @@ static int apci3120_cyclic_ai(int mode, apci3120_clr_timer2_interrupt(dev); - /* enable timer counter and disable watch dog */ - devpriv->mode |= APCI3120_MODE_TIMER2_AS_COUNTER; - /* select EOS clock input for timer 2 */ - devpriv->mode |= APCI3120_TIMER2_SELECT_EOS; - /* Enable timer2 interrupt */ - devpriv->mode |= APCI3120_MODE_TIMER2_IRQ_ENA; + devpriv->mode |= APCI3120_MODE_TIMER2_AS_COUNTER | + APCI3120_MODE_TIMER2_CLK_EOS | + APCI3120_MODE_TIMER2_IRQ_ENA; outb(devpriv->mode, dev->iobase + APCI3120_WRITE_MODE_SELECT); + devpriv->b_Timer2Mode = APCI3120_COUNTER; devpriv->b_Timer2Interrupt = APCI3120_ENABLE; } diff --git a/drivers/staging/comedi/drivers/addi_apci_3120.c b/drivers/staging/comedi/drivers/addi_apci_3120.c index ed51f41cd761..10155e6b322f 100644 --- a/drivers/staging/comedi/drivers/addi_apci_3120.c +++ b/drivers/staging/comedi/drivers/addi_apci_3120.c @@ -40,6 +40,11 @@ #define APCI3120_CTR0_REG 0x0d #define APCI3120_CTR0_DO_BITS(x) ((x) << 4) #define APCI3120_CTR0_TIMER_SEL(x) ((x) << 0) +#define APCI3120_MODE_TIMER2_CLK_OSC (0 << 6) +#define APCI3120_MODE_TIMER2_CLK_OUT1 (1 << 6) +#define APCI3120_MODE_TIMER2_CLK_EOC (2 << 6) +#define APCI3120_MODE_TIMER2_CLK_EOS (3 << 6) +#define APCI3120_MODE_TIMER2_CLK_MASK (3 << 6) #define APCI3120_MODE_TIMER2_AS_TIMER (0 << 4) #define APCI3120_MODE_TIMER2_AS_COUNTER (1 << 4) #define APCI3120_MODE_TIMER2_AS_WDOG (2 << 4)