From: Tom Tromey Date: Tue, 4 May 2021 14:56:12 +0000 (-0600) Subject: Add missing stdlib.h includes to sim X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=be7547b07780effc5ad8a37f48ec4047053ef6ba;p=deliverable%2Fbinutils-gdb.git Add missing stdlib.h includes to sim This updates the various "mloop.in" files to emit an include of stdlib.h, to avoid warnings about 'abort' being undeclared. One such warning now remains, in mn10300.igen. I don't know offhand the best way to fix this one. 2021-05-04 Tom Tromey * mloop.in: Include . sim/iq2000/ChangeLog 2021-05-04 Tom Tromey * mloop.in: Include . sim/lm32/ChangeLog 2021-05-04 Tom Tromey * mloop.in: Include . sim/m32r/ChangeLog 2021-05-04 Tom Tromey * mloop.in: Include . sim/or1k/ChangeLog 2021-05-04 Tom Tromey * mloop.in: Include . --- diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog index 4cad5c8eb4..81ae5e6f26 100644 --- a/sim/cris/ChangeLog +++ b/sim/cris/ChangeLog @@ -1,3 +1,7 @@ +2021-05-04 Tom Tromey + + * mloop.in: Include . + 2021-05-04 Mike Frysinger * configure: Regenerate. diff --git a/sim/cris/mloop.in b/sim/cris/mloop.in index 32f5fef95f..645d821160 100644 --- a/sim/cris/mloop.in +++ b/sim/cris/mloop.in @@ -42,6 +42,8 @@ case "x$1" in xsupport) cat < + /* It seems we don't have a templated header file corresponding to cris-tmpl.c, so we have to get out declarations the hackish way. */ extern void @cpu@_specific_init (SIM_CPU *current_cpu); diff --git a/sim/iq2000/ChangeLog b/sim/iq2000/ChangeLog index 550be28f65..5dbfb7a69b 100644 --- a/sim/iq2000/ChangeLog +++ b/sim/iq2000/ChangeLog @@ -1,3 +1,7 @@ +2021-05-04 Tom Tromey + + * mloop.in: Include . + 2021-05-04 Mike Frysinger * configure: Regenerate. diff --git a/sim/iq2000/mloop.in b/sim/iq2000/mloop.in index b973fa106a..7d3a9b5e9a 100644 --- a/sim/iq2000/mloop.in +++ b/sim/iq2000/mloop.in @@ -40,6 +40,7 @@ case "x$1" in xsupport) cat < static INLINE const IDESC * extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, diff --git a/sim/lm32/ChangeLog b/sim/lm32/ChangeLog index eac37deb41..f169b1b240 100644 --- a/sim/lm32/ChangeLog +++ b/sim/lm32/ChangeLog @@ -1,3 +1,7 @@ +2021-05-04 Tom Tromey + + * mloop.in: Include . + 2021-05-04 Mike Frysinger * configure: Regenerate. diff --git a/sim/lm32/mloop.in b/sim/lm32/mloop.in index a8db7f5176..574f00a511 100644 --- a/sim/lm32/mloop.in +++ b/sim/lm32/mloop.in @@ -32,6 +32,7 @@ case "x$1" in xsupport) cat < static INLINE const IDESC * extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index e247deb034..9737efb2fb 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,7 @@ +2021-05-04 Tom Tromey + + * mloop.in: Include . + 2021-05-04 Mike Frysinger * configure: Regenerate. diff --git a/sim/m32r/mloop.in b/sim/m32r/mloop.in index 405a7e9273..6b0d0dec61 100644 --- a/sim/m32r/mloop.in +++ b/sim/m32r/mloop.in @@ -42,6 +42,7 @@ case "x$1" in xsupport) cat < static INLINE const IDESC * extract16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, diff --git a/sim/or1k/ChangeLog b/sim/or1k/ChangeLog index 33f41ff6bb..55b923ddfd 100644 --- a/sim/or1k/ChangeLog +++ b/sim/or1k/ChangeLog @@ -1,3 +1,7 @@ +2021-05-04 Tom Tromey + + * mloop.in: Include . + 2021-05-04 Mike Frysinger * configure: Regenerate. diff --git a/sim/or1k/mloop.in b/sim/or1k/mloop.in index 49c4227620..a94b534a9a 100644 --- a/sim/or1k/mloop.in +++ b/sim/or1k/mloop.in @@ -42,6 +42,7 @@ case "x$1" in xsupport) cat < static INLINE const IDESC * extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,