From: David Edelsohn Date: Mon, 22 Apr 1996 23:44:44 +0000 (+0000) Subject: New testcase for sparclet extensions. X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=bee69a3283f1dff889f5cb053410eec0edda9a7c;p=deliverable%2Fbinutils-gdb.git New testcase for sparclet extensions. --- diff --git a/gas/testsuite/gas/sparc/.Sanitize b/gas/testsuite/gas/sparc/.Sanitize index e67b6ef9ba..f2d27a7faf 100644 --- a/gas/testsuite/gas/sparc/.Sanitize +++ b/gas/testsuite/gas/sparc/.Sanitize @@ -33,6 +33,8 @@ prefetch.d prefetch.s rdpr.d rdpr.s +splet.d +splet.s synth.d synth.s synth64.d diff --git a/gas/testsuite/gas/sparc/splet.d b/gas/testsuite/gas/sparc/splet.d new file mode 100644 index 0000000000..cee258eeaa --- /dev/null +++ b/gas/testsuite/gas/sparc/splet.d @@ -0,0 +1,169 @@ +#as: -Asparclet +#objdump: -dr +#name: sparclet extensions + +.*: +file format .* + +Disassembly of section .text: +0+0000 rd %y, %l0 +0+0004 rd %asr1, %l0 +0+0008 rd %asr15, %l0 +0+000c rd %asr17, %l0 +0+0010 rd %asr18, %l0 +0+0014 rd %asr19, %l0 +0+0018 rd %asr20, %l0 +0+001c rd %asr21, %l0 +0+0020 rd %asr22, %l0 +0+0024 mov %l0, %y +0+0028 mov %l0, %asr1 +0+002c mov %l0, %asr15 +0+0030 mov %l0, %asr17 +0+0034 mov %l0, %asr18 +0+0038 mov %l0, %asr19 +0+003c mov %l0, %asr20 +0+0040 mov %l0, %asr21 +0+0044 mov %l0, %asr22 +0+0048 umul %g1, %g2, %g3 +0+004c umul %g1, %g2, %g3 +0+0050 smul %g1, %g2, %g3 +0+0054 smul %g1, %g2, %g3 +0+0058 stbar +0+005c stbar +0+0060 unimp 0x1 +0+0064 flush %l1 +0+0068 scan %l1, -1, %l3 +0+006c scan %l1, 0, %l3 +0+0070 scan %l1, %l1, %l3 +0+0074 shuffle %l0, 1, %l1 +0+0078 shuffle %l0, 2, %l1 +0+007c shuffle %l0, 4, %l1 +0+0080 shuffle %l0, 8, %l1 +0+0084 shuffle %l0, 0x10, %l1 +0+0088 shuffle %l0, 0x18, %l1 +0+008c umac %l1, %l2, %l0 +0+0090 umac %l1, 2, %l0 +0+0094 umac %l1, 2, %l0 +0+0098 umacd %l2, %l4, %l0 +0+009c umacd %l2, 3, %l0 +0+00a0 umacd %l2, 3, %l0 +0+00a4 smac %l1, %l2, %l0 +0+00a8 smac %l1, -42, %l0 +0+00ac smac %l1, -42, %l0 +0+00b0 smacd %l2, %l4, %l0 +0+00b4 smacd %l2, 0x7b, %l0 +0+00b8 smacd %l2, 0x7b, %l0 +0+00bc umuld %o2, %o4, %o0 +0+00c0 umuld %o2, 0x234, %o0 +0+00c4 umuld %o2, 0x567, %o0 +0+00c8 smuld %i2, %i4, %i0 +0+00cc smuld %i2, -4096, %i0 +0+00d0 smuld %i4, 0xfff, %i0 +0+00d4 cpush %l0, %l1 +0+00d8 cpush %l0, 1 +0+00dc cpusha %l0, %l1 +0+00e0 cpush %l0, 1 +0+00e4 cpull %l0 +0+00e8 crdcxt %ccsr, %l0 +0+00ec crdcxt %ccfr, %l0 +0+00f0 crdcxt %ccpr, %l0 +0+00f4 crdcxt %cccrcr, %l0 +0+00f8 cwrcxt %l0, %ccsr +0+00fc cwrcxt %l0, %ccfr +0+0100 cwrcxt %l0, %ccpr +0+0104 cwrcxt %l0, %cccrcr +0+0108 cbn 0000010c +.*RELOC: 0+0108 WDISP22 stop\+0xfffffef8 +0+010c nop +0+0110 cbn,a 00000114 +.*RELOC: 0+0110 WDISP22 stop\+0xfffffef0 +0+0114 nop +0+0118 cbe 0000011c +.*RELOC: 0+0118 WDISP22 stop\+0xfffffee8 +0+011c nop +0+0120 cbe,a 00000124 +.*RELOC: 0+0120 WDISP22 stop\+0xfffffee0 +0+0124 nop +0+0128 cbf 0000012c +.*RELOC: 0+0128 WDISP22 stop\+0xfffffed8 +0+012c nop +0+0130 cbf,a 00000134 +.*RELOC: 0+0130 WDISP22 stop\+0xfffffed0 +0+0134 nop +0+0138 cbef 0000013c +.*RELOC: 0+0138 WDISP22 stop\+0xfffffec8 +0+013c nop +0+0140 cbef,a 00000144 +.*RELOC: 0+0140 WDISP22 stop\+0xfffffec0 +0+0144 nop +0+0148 cbr 0000014c +.*RELOC: 0+0148 WDISP22 stop\+0xfffffeb8 +0+014c nop +0+0150 cbr,a 00000154 +.*RELOC: 0+0150 WDISP22 stop\+0xfffffeb0 +0+0154 nop +0+0158 cber 0000015c +.*RELOC: 0+0158 WDISP22 stop\+0xfffffea8 +0+015c nop +0+0160 cber,a 00000164 +.*RELOC: 0+0160 WDISP22 stop\+0xfffffea0 +0+0164 nop +0+0168 cbfr 0000016c +.*RELOC: 0+0168 WDISP22 stop\+0xfffffe98 +0+016c nop +0+0170 cbfr,a 00000174 +.*RELOC: 0+0170 WDISP22 stop\+0xfffffe90 +0+0174 nop +0+0178 cbefr 0000017c +.*RELOC: 0+0178 WDISP22 stop\+0xfffffe88 +0+017c nop +0+0180 cbefr,a 00000184 +.*RELOC: 0+0180 WDISP22 stop\+0xfffffe80 +0+0184 nop +0+0188 cba 0000018c +.*RELOC: 0+0188 WDISP22 stop\+0xfffffe78 +0+018c nop +0+0190 cba,a 00000194 +.*RELOC: 0+0190 WDISP22 stop\+0xfffffe70 +0+0194 nop +0+0198 cbne 0000019c +.*RELOC: 0+0198 WDISP22 stop\+0xfffffe68 +0+019c nop +0+01a0 cbne,a 000001a4 +.*RELOC: 0+01a0 WDISP22 stop\+0xfffffe60 +0+01a4 nop +0+01a8 cbnf 000001ac +.*RELOC: 0+01a8 WDISP22 stop\+0xfffffe58 +0+01ac nop +0+01b0 cbnf,a 000001b4 +.*RELOC: 0+01b0 WDISP22 stop\+0xfffffe50 +0+01b4 nop +0+01b8 cbnef 000001bc +.*RELOC: 0+01b8 WDISP22 stop\+0xfffffe48 +0+01bc nop +0+01c0 cbnef,a 000001c4 +.*RELOC: 0+01c0 WDISP22 stop\+0xfffffe40 +0+01c4 nop +0+01c8 cbnr 000001cc +.*RELOC: 0+01c8 WDISP22 stop\+0xfffffe38 +0+01cc nop +0+01d0 cbnr,a 000001d4 +.*RELOC: 0+01d0 WDISP22 stop\+0xfffffe30 +0+01d4 nop +0+01d8 cbner 000001dc +.*RELOC: 0+01d8 WDISP22 stop\+0xfffffe28 +0+01dc nop +0+01e0 cbner,a 000001e4 +.*RELOC: 0+01e0 WDISP22 stop\+0xfffffe20 +0+01e4 nop +0+01e8 cbnfr 000001ec +.*RELOC: 0+01e8 WDISP22 stop\+0xfffffe18 +0+01ec nop +0+01f0 cbnfr,a 000001f4 +.*RELOC: 0+01f0 WDISP22 stop\+0xfffffe10 +0+01f4 nop +0+01f8 cbnefr 000001fc +.*RELOC: 0+01f8 WDISP22 stop\+0xfffffe08 +0+01fc nop +0+0200 cbnefr,a 00000204 +.*RELOC: 0+0200 WDISP22 stop\+0xfffffe00 +0+0204 nop diff --git a/gas/testsuite/gas/sparc/splet.s b/gas/testsuite/gas/sparc/splet.s new file mode 100644 index 0000000000..0dfd5074bd --- /dev/null +++ b/gas/testsuite/gas/sparc/splet.s @@ -0,0 +1,211 @@ + .text + .global start + +! Starting point +start: + +! test all ASRs + + rd %asr0, %l0 + rd %asr1, %l0 + rd %asr15, %l0 + rd %asr17, %l0 + rd %asr18, %l0 + rd %asr19, %l0 ! should stop the processor + rd %asr20, %l0 + rd %asr21, %l0 + rd %asr22, %l0 + + wr %l0, 0, %asr0 + wr %l0, 0, %asr1 + wr %l0, 0, %asr15 + wr %l0, 0, %asr17 + wr %l0, 0, %asr18 + wr %l0, 0, %asr19 + wr %l0, 0, %asr20 + wr %l0, 0, %asr21 + wr %l0, 0, %asr22 + +! test UMUL with no overflow inside Y +test_umul: + umul %g1, %g2, %g3 + +! test UMUL with an overflow inside Y + + umul %g1, %g2, %g3 ! %g3 must be equal to 0 + +! test SMUL with negative result +test_smul: + smul %g1, %g2, %g3 + +! test SMUL with positive result + + smul %g1, %g2, %g3 + +! test STBAR: there are two possible syntaxes +test_stbar: + stbar ! is a valid V8 syntax, at least a synthetic + ! instruction + rd %asr15, %g0 ! other solution + +! test UNIMP + unimp 1 + +! test FLUSH + flush %l1 ! is the official V8 syntax + +! test SCAN: find first 0 +test_scan: + scan %l1, 0xffffffff, %l3 + +! test scan: find first 1 + + scan %l1, 0, %l3 + +! test scan: find first bit != bit-0 + + scan %l1, %l1, %l3 + +! test SHUFFLE +test_shuffle: + shuffle %l0, 0x1, %l1 + shuffle %l0, 0x2, %l1 + shuffle %l0, 0x4, %l1 + shuffle %l0, 0x8, %l1 + shuffle %l0, 0x10, %l1 + shuffle %l0, 0x18, %l1 + +! test UMAC +test_umac: + umac %l1, %l2, %l0 + umac %l1, 2, %l0 + umac 2, %l1, %l0 + +! test UMACD +test_umacd: + umacd %l2, %l4, %l0 + umacd %l2, 3, %l0 + umacd 3, %l2, %l0 + +! test SMAC +test_smac: + smac %l1, %l2, %l0 + smac %l1, -42, %l0 + smac -42, %l1, %l0 + +! test SMACD +test_smacd: + smacd %l2, %l4, %l0 + smacd %l2, 123, %l0 + smacd 123, %l2, %l0 + +! test UMULD +test_umuld: + umuld %o2, %o4, %o0 + umuld %o2, 0x234, %o0 + umuld 0x567, %o2, %o0 + +! test SMULD +test_smuld: + smuld %i2, %i4, %i0 + smuld %i2, -4096, %i0 + smuld 4095, %i4, %i0 + +! Coprocessor instructions +test_coprocessor: +! %ccsr is register # 0 +! %ccfr is register # 1 +! %ccpr is register # 3 +! %cccrcr is register # 2 + +! test CPUSH: just syntax + + cpush %l0, %l1 + cpush %l0, 1 + cpusha %l0, %l1 + cpusha %l0, 1 + +! test CPULL: just syntax + + cpull %l0 + +! test CPRDCXT: just syntax + + crdcxt %ccsr, %l0 + crdcxt %ccfr, %l0 + crdcxt %ccpr, %l0 + crdcxt %cccrcr, %l0 + +! test CPWRCXT: just syntax + + cwrcxt %l0, %ccsr + cwrcxt %l0, %ccfr + cwrcxt %l0, %ccpr + cwrcxt %l0, %cccrcr + +! test CBccc: just syntax + + cbn stop + nop + cbn,a stop + nop + cbe stop + nop + cbe,a stop + nop + cbf stop + nop + cbf,a stop + nop + cbef stop + nop + cbef,a stop + nop + cbr stop + nop + cbr,a stop + nop + cber stop + nop + cber,a stop + nop + cbfr stop + nop + cbfr,a stop + nop + cbefr stop + nop + cbefr,a stop + nop + cba stop + nop + cba,a stop + nop + cbne stop + nop + cbne,a stop + nop + cbnf stop + nop + cbnf,a stop + nop + cbnef stop + nop + cbnef,a stop + nop + cbnr stop + nop + cbnr,a stop + nop + cbner stop + nop + cbner,a stop + nop + cbnfr stop + nop + cbnfr,a stop + nop + cbnefr stop + nop + cbnefr,a stop + nop