From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Thu, 25 Aug 2016 11:20:46 +0000 (+0100)
Subject: clk: gcc-msm8996: Fix pcie 2 pipe register offset
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=ce61966c05f276294b6be04d1765ad0d827ddefd;p=deliverable%2Flinux.git

clk: gcc-msm8996: Fix pcie 2 pipe register offset

This patch corrects the register offset for pcie2 pipe clock.
Offset according to datasheet is 0x6e018 instead of 0x6e108.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---

diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 3afe42c9d611..2c367711feeb 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2592,9 +2592,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
 };
 
 static struct clk_branch gcc_pcie_2_pipe_clk = {
-	.halt_reg = 0x6e108,
+	.halt_reg = 0x6e018,
 	.clkr = {
-		.enable_reg = 0x6e108,
+		.enable_reg = 0x6e018,
 		.enable_mask = BIT(0),
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_pcie_2_pipe_clk",