From: Joerg Roedel Date: Thu, 16 Jul 2015 08:29:13 +0000 (+0200) Subject: serial: 8250: Do XR17V35X specific wakeup in serial8250_do_startup X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=da891641b6c92e260966dfce3dd93111d08656c8;p=deliverable%2Flinux.git serial: 8250: Do XR17V35X specific wakeup in serial8250_do_startup The XR17V35X UART needs the ECB bit set in its XR_EFR register to enable access to IER [7:5], ISR [5:4], FCR[5:4], MCR[7:5], and MSR [7:0]. Also reset the IER register to mask interrupts after access to all bits of this register has been enabled. This makes my 8-port XR17V35X working with the in-kernel serial driver. Cc: Joe Schultz Signed-off-by: Joerg Roedel Reviewed-by: Peter Hurley Reviewed-by: Michael Welling Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index de6655d50c37..54e6c8ddef5d 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -1834,6 +1834,21 @@ int serial8250_do_startup(struct uart_port *port) */ enable_rsa(up); #endif + + if (port->type == PORT_XR17V35X) { + /* + * First enable access to IER [7:5], ISR [5:4], FCR [5:4], + * MCR [7:5] and MSR [7:0] + */ + serial_port_out(port, UART_XR_EFR, UART_EFR_ECB); + + /* + * Make sure all interrups are masked until initialization is + * complete and the FIFOs are cleared + */ + serial_port_out(port, UART_IER, 0); + } + /* * Clear the FIFO buffers and disable them. * (they will be reenabled in set_termios())